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Bug # 179

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-__CPAchecker_initialize()
{
20 typedef unsigned char __u8;
23 typedef unsigned short __u16;
25 typedef int __s32;
26 typedef unsigned int __u32;
29 typedef long long __s64;
30 typedef unsigned long long __u64;
15 typedef signed char s8;
16 typedef unsigned char u8;
18 typedef short s16;
19 typedef unsigned short u16;
21 typedef int s32;
22 typedef unsigned int u32;
24 typedef long long s64;
25 typedef unsigned long long u64;
14 typedef long __kernel_long_t;
15 typedef unsigned long __kernel_ulong_t;
27 typedef int __kernel_pid_t;
48 typedef unsigned int __kernel_uid32_t;
49 typedef unsigned int __kernel_gid32_t;
71 typedef __kernel_ulong_t __kernel_size_t;
72 typedef __kernel_long_t __kernel_ssize_t;
87 typedef long long __kernel_loff_t;
88 typedef __kernel_long_t __kernel_time_t;
89 typedef __kernel_long_t __kernel_clock_t;
90 typedef int __kernel_timer_t;
91 typedef int __kernel_clockid_t;
291 struct kernel_symbol { unsigned long value; const char *name; } ;
34 struct module ;
12 typedef __u32 __kernel_dev_t;
15 typedef __kernel_dev_t dev_t;
18 typedef unsigned short umode_t;
21 typedef __kernel_pid_t pid_t;
26 typedef __kernel_clockid_t clockid_t;
29 typedef _Bool bool;
31 typedef __kernel_uid32_t uid_t;
32 typedef __kernel_gid32_t gid_t;
45 typedef __kernel_loff_t loff_t;
54 typedef __kernel_size_t size_t;
59 typedef __kernel_ssize_t ssize_t;
69 typedef __kernel_time_t time_t;
91 typedef unsigned int uint;
102 typedef __s32 int32_t;
108 typedef __u32 uint32_t;
133 typedef unsigned long sector_t;
134 typedef unsigned long blkcnt_t;
152 typedef u64 dma_addr_t;
157 typedef unsigned int gfp_t;
158 typedef unsigned int fmode_t;
161 typedef u64 phys_addr_t;
166 typedef phys_addr_t resource_size_t;
176 struct __anonstruct_atomic_t_6 { int counter; } ;
176 typedef struct __anonstruct_atomic_t_6 atomic_t;
181 struct __anonstruct_atomic64_t_7 { long counter; } ;
181 typedef struct __anonstruct_atomic64_t_7 atomic64_t;
182 struct list_head { struct list_head *next; struct list_head *prev; } ;
187 struct hlist_node ;
187 struct hlist_head { struct hlist_node *first; } ;
191 struct hlist_node { struct hlist_node *next; struct hlist_node **pprev; } ;
202 struct callback_head { struct callback_head *next; void (*func)(struct callback_head *); } ;
115 typedef void (*ctor_fn_t)();
283 struct _ddebug { const char *modname; const char *function; const char *filename; const char *format; unsigned int lineno; unsigned char flags; } ;
58 struct device ;
474 struct file_operations ;
486 struct completion ;
487 struct pt_regs ;
27 union __anonunion___u_9 { struct list_head *__val; char __c[1U]; } ;
65 union __anonunion___u_11 { struct list_head *__val; char __c[1U]; } ;
105 union __anonunion___u_13 { struct list_head *__val; char __c[1U]; } ;
202 union __anonunion___u_15 { struct list_head *__val; char __c[1U]; } ;
546 struct bug_entry { int bug_addr_disp; int file_disp; unsigned short line; unsigned short flags; } ;
131 struct timespec ;
132 struct compat_timespec ;
133 struct pollfd ;
134 struct __anonstruct_futex_27 { u32 *uaddr; u32 val; u32 flags; u32 bitset; u64 time; u32 *uaddr2; } ;
134 struct __anonstruct_nanosleep_28 { clockid_t clockid; struct timespec *rmtp; struct compat_timespec *compat_rmtp; u64 expires; } ;
134 struct __anonstruct_poll_29 { struct pollfd *ufds; int nfds; int has_timeout; unsigned long tv_sec; unsigned long tv_nsec; } ;
134 union __anonunion____missing_field_name_26 { struct __anonstruct_futex_27 futex; struct __anonstruct_nanosleep_28 nanosleep; struct __anonstruct_poll_29 poll; } ;
134 struct restart_block { long int (*fn)(struct restart_block *); union __anonunion____missing_field_name_26 __annonCompField4; } ;
50 struct task_struct ;
39 struct page ;
14 struct __anonstruct_pfn_t_30 { u64 val; } ;
14 typedef struct __anonstruct_pfn_t_30 pfn_t;
26 struct mm_struct ;
288 struct pt_regs { unsigned long r15; unsigned long r14; unsigned long r13; unsigned long r12; unsigned long bp; unsigned long bx; unsigned long r11; unsigned long r10; unsigned long r9; unsigned long r8; unsigned long ax; unsigned long cx; unsigned long dx; unsigned long si; unsigned long di; unsigned long orig_ax; unsigned long ip; unsigned long cs; unsigned long flags; unsigned long sp; unsigned long ss; } ;
66 struct __anonstruct____missing_field_name_32 { unsigned int a; unsigned int b; } ;
66 struct __anonstruct____missing_field_name_33 { u16 limit0; u16 base0; unsigned char base1; unsigned char type; unsigned char s; unsigned char dpl; unsigned char p; unsigned char limit; unsigned char avl; unsigned char l; unsigned char d; unsigned char g; unsigned char base2; } ;
66 union __anonunion____missing_field_name_31 { struct __anonstruct____missing_field_name_32 __annonCompField5; struct __anonstruct____missing_field_name_33 __annonCompField6; } ;
66 struct desc_struct { union __anonunion____missing_field_name_31 __annonCompField7; } ;
13 typedef unsigned long pteval_t;
14 typedef unsigned long pmdval_t;
15 typedef unsigned long pudval_t;
16 typedef unsigned long pgdval_t;
17 typedef unsigned long pgprotval_t;
19 struct __anonstruct_pte_t_34 { pteval_t pte; } ;
19 typedef struct __anonstruct_pte_t_34 pte_t;
21 struct pgprot { pgprotval_t pgprot; } ;
256 typedef struct pgprot pgprot_t;
258 struct __anonstruct_pgd_t_35 { pgdval_t pgd; } ;
258 typedef struct __anonstruct_pgd_t_35 pgd_t;
276 struct __anonstruct_pud_t_36 { pudval_t pud; } ;
276 typedef struct __anonstruct_pud_t_36 pud_t;
297 struct __anonstruct_pmd_t_37 { pmdval_t pmd; } ;
297 typedef struct __anonstruct_pmd_t_37 pmd_t;
423 typedef struct page *pgtable_t;
434 struct file ;
445 struct seq_file ;
481 struct thread_struct ;
483 struct cpumask ;
20 struct qspinlock { atomic_t val; } ;
33 typedef struct qspinlock arch_spinlock_t;
34 struct qrwlock { atomic_t cnts; arch_spinlock_t wait_lock; } ;
14 typedef struct qrwlock arch_rwlock_t;
247 struct math_emu_info { long ___orig_eip; struct pt_regs *regs; } ;
83 struct static_key { atomic_t enabled; } ;
26 union __anonunion___u_42 { int __val; char __c[1U]; } ;
38 union __anonunion___u_44 { int __val; char __c[1U]; } ;
23 typedef atomic64_t atomic_long_t;
359 struct cpumask { unsigned long bits[128U]; } ;
15 typedef struct cpumask cpumask_t;
657 typedef struct cpumask *cpumask_var_t;
22 struct tracepoint_func { void *func; void *data; int prio; } ;
28 struct tracepoint { const char *name; struct static_key key; int (*regfunc)(); void (*unregfunc)(); struct tracepoint_func *funcs; } ;
233 struct fregs_state { u32 cwd; u32 swd; u32 twd; u32 fip; u32 fcs; u32 foo; u32 fos; u32 st_space[20U]; u32 status; } ;
26 struct __anonstruct____missing_field_name_61 { u64 rip; u64 rdp; } ;
26 struct __anonstruct____missing_field_name_62 { u32 fip; u32 fcs; u32 foo; u32 fos; } ;
26 union __anonunion____missing_field_name_60 { struct __anonstruct____missing_field_name_61 __annonCompField13; struct __anonstruct____missing_field_name_62 __annonCompField14; } ;
26 union __anonunion____missing_field_name_63 { u32 padding1[12U]; u32 sw_reserved[12U]; } ;
26 struct fxregs_state { u16 cwd; u16 swd; u16 twd; u16 fop; union __anonunion____missing_field_name_60 __annonCompField15; u32 mxcsr; u32 mxcsr_mask; u32 st_space[32U]; u32 xmm_space[64U]; u32 padding[12U]; union __anonunion____missing_field_name_63 __annonCompField16; } ;
66 struct swregs_state { u32 cwd; u32 swd; u32 twd; u32 fip; u32 fcs; u32 foo; u32 fos; u32 st_space[20U]; u8 ftop; u8 changed; u8 lookahead; u8 no_update; u8 rm; u8 alimit; struct math_emu_info *info; u32 entry_eip; } ;
227 struct xstate_header { u64 xfeatures; u64 xcomp_bv; u64 reserved[6U]; } ;
233 struct xregs_state { struct fxregs_state i387; struct xstate_header header; u8 extended_state_area[0U]; } ;
254 union fpregs_state { struct fregs_state fsave; struct fxregs_state fxsave; struct swregs_state soft; struct xregs_state xsave; u8 __padding[4096U]; } ;
271 struct fpu { unsigned int last_cpu; unsigned char fpstate_active; unsigned char fpregs_active; union fpregs_state state; } ;
181 struct seq_operations ;
415 struct perf_event ;
420 struct __anonstruct_mm_segment_t_75 { unsigned long seg; } ;
420 typedef struct __anonstruct_mm_segment_t_75 mm_segment_t;
421 struct thread_struct { struct desc_struct tls_array[3U]; unsigned long sp0; unsigned long sp; unsigned short es; unsigned short ds; unsigned short fsindex; unsigned short gsindex; u32 status; unsigned long fsbase; unsigned long gsbase; struct perf_event *ptrace_bps[4U]; unsigned long debugreg6; unsigned long ptrace_dr7; unsigned long cr2; unsigned long trap_nr; unsigned long error_code; unsigned long *io_bitmap_ptr; unsigned long iopl; unsigned int io_bitmap_max; mm_segment_t addr_limit; unsigned char sig_on_uaccess_err; unsigned char uaccess_err; struct fpu fpu; } ;
48 struct thread_info { unsigned long flags; } ;
33 struct lockdep_map ;
55 struct stack_trace { unsigned int nr_entries; unsigned int max_entries; unsigned long *entries; int skip; } ;
28 struct lockdep_subclass_key { char __one_byte; } ;
53 struct lock_class_key { struct lockdep_subclass_key subkeys[8U]; } ;
59 struct lock_class { struct hlist_node hash_entry; struct list_head lock_entry; struct lockdep_subclass_key *key; unsigned int subclass; unsigned int dep_gen_id; unsigned long usage_mask; struct stack_trace usage_traces[13U]; struct list_head locks_after; struct list_head locks_before; unsigned int version; unsigned long ops; const char *name; int name_version; unsigned long contention_point[4U]; unsigned long contending_point[4U]; } ;
144 struct lockdep_map { struct lock_class_key *key; struct lock_class *class_cache[2U]; const char *name; int cpu; unsigned long ip; } ;
207 struct held_lock { u64 prev_chain_key; unsigned long acquire_ip; struct lockdep_map *instance; struct lockdep_map *nest_lock; u64 waittime_stamp; u64 holdtime_stamp; unsigned short class_idx; unsigned char irq_context; unsigned char trylock; unsigned char read; unsigned char check; unsigned char hardirqs_off; unsigned short references; unsigned int pin_count; } ;
593 struct raw_spinlock { arch_spinlock_t raw_lock; unsigned int magic; unsigned int owner_cpu; void *owner; struct lockdep_map dep_map; } ;
32 typedef struct raw_spinlock raw_spinlock_t;
33 struct __anonstruct____missing_field_name_77 { u8 __padding[24U]; struct lockdep_map dep_map; } ;
33 union __anonunion____missing_field_name_76 { struct raw_spinlock rlock; struct __anonstruct____missing_field_name_77 __annonCompField19; } ;
33 struct spinlock { union __anonunion____missing_field_name_76 __annonCompField20; } ;
76 typedef struct spinlock spinlock_t;
23 struct __anonstruct_rwlock_t_78 { arch_rwlock_t raw_lock; unsigned int magic; unsigned int owner_cpu; void *owner; struct lockdep_map dep_map; } ;
23 typedef struct __anonstruct_rwlock_t_78 rwlock_t;
408 struct seqcount { unsigned int sequence; struct lockdep_map dep_map; } ;
52 typedef struct seqcount seqcount_t;
601 struct timespec { __kernel_time_t tv_sec; long tv_nsec; } ;
19 struct timezone { int tz_minuteswest; int tz_dsttime; } ;
7 typedef __s64 time64_t;
83 struct user_namespace ;
22 struct __anonstruct_kuid_t_94 { uid_t val; } ;
22 typedef struct __anonstruct_kuid_t_94 kuid_t;
27 struct __anonstruct_kgid_t_95 { gid_t val; } ;
27 typedef struct __anonstruct_kgid_t_95 kgid_t;
139 struct kstat { u32 result_mask; umode_t mode; unsigned int nlink; uint32_t blksize; u64 attributes; u64 ino; dev_t dev; dev_t rdev; kuid_t uid; kgid_t gid; loff_t size; struct timespec atime; struct timespec mtime; struct timespec ctime; struct timespec btime; u64 blocks; } ;
48 struct vm_area_struct ;
13 struct __wait_queue ;
13 typedef struct __wait_queue wait_queue_t;
16 struct __wait_queue { unsigned int flags; void *private; int (*func)(wait_queue_t *, unsigned int, int, void *); struct list_head task_list; } ;
39 struct __wait_queue_head { spinlock_t lock; struct list_head task_list; } ;
44 typedef struct __wait_queue_head wait_queue_head_t;
97 struct __anonstruct_nodemask_t_96 { unsigned long bits[16U]; } ;
97 typedef struct __anonstruct_nodemask_t_96 nodemask_t;
247 typedef unsigned int isolate_mode_t;
13 struct optimistic_spin_queue { atomic_t tail; } ;
39 struct ww_acquire_ctx ;
40 struct mutex { atomic_long_t owner; spinlock_t wait_lock; struct optimistic_spin_queue osq; struct list_head wait_list; void *magic; struct lockdep_map dep_map; } ;
72 struct mutex_waiter { struct list_head list; struct task_struct *task; struct ww_acquire_ctx *ww_ctx; void *magic; } ;
229 struct rw_semaphore ;
230 struct rw_semaphore { atomic_long_t count; struct list_head wait_list; raw_spinlock_t wait_lock; struct optimistic_spin_queue osq; struct task_struct *owner; struct lockdep_map dep_map; } ;
28 typedef s64 ktime_t;
365 struct srcu_struct ;
1109 struct timer_list { struct hlist_node entry; unsigned long expires; void (*function)(unsigned long); unsigned long data; u32 flags; struct lockdep_map lockdep_map; } ;
211 struct hrtimer ;
212 enum hrtimer_restart ;
235 struct workqueue_struct ;
236 struct work_struct ;
54 struct work_struct { atomic_long_t data; struct list_head entry; void (*func)(struct work_struct *); struct lockdep_map lockdep_map; } ;
107 struct delayed_work { struct work_struct work; struct timer_list timer; struct workqueue_struct *wq; int cpu; } ;
153 struct execute_work { struct work_struct work; } ;
642 struct srcu_array { unsigned long lock_count[2U]; unsigned long unlock_count[2U]; } ;
40 struct rcu_batch { struct callback_head *head; struct callback_head **tail; } ;
44 struct srcu_struct { unsigned long completed; struct srcu_array *per_cpu_ref; spinlock_t queue_lock; bool running; struct rcu_batch batch_queue; struct rcu_batch batch_check0; struct rcu_batch batch_check1; struct rcu_batch batch_done; struct delayed_work work; struct lockdep_map dep_map; } ;
217 struct resource ;
68 struct resource { resource_size_t start; resource_size_t end; const char *name; unsigned long flags; unsigned long desc; struct resource *parent; struct resource *sibling; struct resource *child; } ;
236 struct pci_dev ;
144 struct pci_bus ;
38 struct ldt_struct ;
38 struct vdso_image ;
38 struct __anonstruct_mm_context_t_161 { struct ldt_struct *ldt; unsigned short ia32_compat; struct mutex lock; void *vdso; const struct vdso_image *vdso_image; atomic_t perf_rdpmc_allowed; u16 pkey_allocation_map; s16 execute_only_pkey; void *bd_addr; } ;
38 typedef struct __anonstruct_mm_context_t_161 mm_context_t;
34 struct bio_vec ;
1266 struct llist_node ;
69 struct llist_node { struct llist_node *next; } ;
17 struct call_single_data { struct llist_node llist; void (*func)(void *); void *info; unsigned int flags; } ;
551 struct rb_node { unsigned long __rb_parent_color; struct rb_node *rb_right; struct rb_node *rb_left; } ;
41 struct rb_root { struct rb_node *rb_node; } ;
835 struct nsproxy ;
37 struct cred ;
19 struct vmacache { u32 seqnum; struct vm_area_struct *vmas[4U]; } ;
41 struct task_rss_stat { int events; int count[4U]; } ;
49 struct mm_rss_stat { atomic_long_t count[4U]; } ;
54 struct page_frag { struct page *page; __u32 offset; __u32 size; } ;
61 struct tlbflush_unmap_batch { struct cpumask cpumask; bool flush_required; bool writable; } ;
85 struct completion { unsigned int done; wait_queue_head_t wait; } ;
108 struct inode ;
58 struct arch_uprobe_task { unsigned long saved_scratch_register; unsigned int saved_trap_nr; unsigned int saved_tf; } ;
66 enum uprobe_task_state { UTASK_RUNNING = 0, UTASK_SSTEP = 1, UTASK_SSTEP_ACK = 2, UTASK_SSTEP_TRAPPED = 3 } ;
73 struct __anonstruct____missing_field_name_215 { struct arch_uprobe_task autask; unsigned long vaddr; } ;
73 struct __anonstruct____missing_field_name_216 { struct callback_head dup_xol_work; unsigned long dup_xol_addr; } ;
73 union __anonunion____missing_field_name_214 { struct __anonstruct____missing_field_name_215 __annonCompField35; struct __anonstruct____missing_field_name_216 __annonCompField36; } ;
73 struct uprobe ;
73 struct return_instance ;
73 struct uprobe_task { enum uprobe_task_state state; union __anonunion____missing_field_name_214 __annonCompField37; struct uprobe *active_uprobe; unsigned long xol_vaddr; struct return_instance *return_instances; unsigned int depth; } ;
95 struct return_instance { struct uprobe *uprobe; unsigned long func; unsigned long stack; unsigned long orig_ret_vaddr; bool chained; struct return_instance *next; } ;
111 struct xol_area ;
112 struct uprobes_state { struct xol_area *xol_area; } ;
151 struct address_space ;
152 struct mem_cgroup ;
153 union __anonunion____missing_field_name_217 { struct address_space *mapping; void *s_mem; atomic_t compound_mapcount; } ;
153 union __anonunion____missing_field_name_218 { unsigned long index; void *freelist; } ;
153 struct __anonstruct____missing_field_name_222 { unsigned short inuse; unsigned short objects; unsigned char frozen; } ;
153 union __anonunion____missing_field_name_221 { atomic_t _mapcount; unsigned int active; struct __anonstruct____missing_field_name_222 __annonCompField40; int units; } ;
153 struct __anonstruct____missing_field_name_220 { union __anonunion____missing_field_name_221 __annonCompField41; atomic_t _refcount; } ;
153 union __anonunion____missing_field_name_219 { unsigned long counters; struct __anonstruct____missing_field_name_220 __annonCompField42; } ;
153 struct dev_pagemap ;
153 struct __anonstruct____missing_field_name_224 { struct page *next; int pages; int pobjects; } ;
153 struct __anonstruct____missing_field_name_225 { unsigned long compound_head; unsigned int compound_dtor; unsigned int compound_order; } ;
153 struct __anonstruct____missing_field_name_226 { unsigned long __pad; pgtable_t pmd_huge_pte; } ;
153 union __anonunion____missing_field_name_223 { struct list_head lru; struct dev_pagemap *pgmap; struct __anonstruct____missing_field_name_224 __annonCompField44; struct callback_head callback_head; struct __anonstruct____missing_field_name_225 __annonCompField45; struct __anonstruct____missing_field_name_226 __annonCompField46; } ;
153 struct kmem_cache ;
153 union __anonunion____missing_field_name_227 { unsigned long private; spinlock_t *ptl; struct kmem_cache *slab_cache; } ;
153 struct page { unsigned long flags; union __anonunion____missing_field_name_217 __annonCompField38; union __anonunion____missing_field_name_218 __annonCompField39; union __anonunion____missing_field_name_219 __annonCompField43; union __anonunion____missing_field_name_223 __annonCompField47; union __anonunion____missing_field_name_227 __annonCompField48; struct mem_cgroup *mem_cgroup; } ;
266 struct userfaultfd_ctx ;
266 struct vm_userfaultfd_ctx { struct userfaultfd_ctx *ctx; } ;
273 struct __anonstruct_shared_228 { struct rb_node rb; unsigned long rb_subtree_last; } ;
273 struct anon_vma ;
273 struct vm_operations_struct ;
273 struct mempolicy ;
273 struct vm_area_struct { unsigned long vm_start; unsigned long vm_end; struct vm_area_struct *vm_next; struct vm_area_struct *vm_prev; struct rb_node vm_rb; unsigned long rb_subtree_gap; struct mm_struct *vm_mm; pgprot_t vm_page_prot; unsigned long vm_flags; struct __anonstruct_shared_228 shared; struct list_head anon_vma_chain; struct anon_vma *anon_vma; const struct vm_operations_struct *vm_ops; unsigned long vm_pgoff; struct file *vm_file; void *vm_private_data; struct mempolicy *vm_policy; struct vm_userfaultfd_ctx vm_userfaultfd_ctx; } ;
346 struct core_thread { struct task_struct *task; struct core_thread *next; } ;
351 struct core_state { atomic_t nr_threads; struct core_thread dumper; struct completion startup; } ;
357 struct kioctx_table ;
358 struct linux_binfmt ;
358 struct mmu_notifier_mm ;
358 struct mm_struct { struct vm_area_struct *mmap; struct rb_root mm_rb; u32 vmacache_seqnum; unsigned long int (*get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); unsigned long mmap_base; unsigned long mmap_legacy_base; unsigned long task_size; unsigned long highest_vm_end; pgd_t *pgd; atomic_t mm_users; atomic_t mm_count; atomic_long_t nr_ptes; atomic_long_t nr_pmds; int map_count; spinlock_t page_table_lock; struct rw_semaphore mmap_sem; struct list_head mmlist; unsigned long hiwater_rss; unsigned long hiwater_vm; unsigned long total_vm; unsigned long locked_vm; unsigned long pinned_vm; unsigned long data_vm; unsigned long exec_vm; unsigned long stack_vm; unsigned long def_flags; unsigned long start_code; unsigned long end_code; unsigned long start_data; unsigned long end_data; unsigned long start_brk; unsigned long brk; unsigned long start_stack; unsigned long arg_start; unsigned long arg_end; unsigned long env_start; unsigned long env_end; unsigned long saved_auxv[46U]; struct mm_rss_stat rss_stat; struct linux_binfmt *binfmt; cpumask_var_t cpu_vm_mask_var; mm_context_t context; unsigned long flags; struct core_state *core_state; spinlock_t ioctx_lock; struct kioctx_table *ioctx_table; struct task_struct *owner; struct user_namespace *user_ns; struct file *exe_file; struct mmu_notifier_mm *mmu_notifier_mm; struct cpumask cpumask_allocation; unsigned long numa_next_scan; unsigned long numa_scan_offset; int numa_scan_seq; bool tlb_flush_pending; struct uprobes_state uprobes_state; atomic_long_t hugetlb_usage; struct work_struct async_put_work; } ;
544 struct vm_fault ;
598 struct vdso_image { void *data; unsigned long size; unsigned long alt; unsigned long alt_len; long sym_vvar_start; long sym_vvar_page; long sym_hpet_page; long sym_pvclock_page; long sym_VDSO32_NOTE_MASK; long sym___kernel_sigreturn; long sym___kernel_rt_sigreturn; long sym___kernel_vsyscall; long sym_int80_landing_pad; } ;
15 typedef __u64 Elf64_Addr;
16 typedef __u16 Elf64_Half;
18 typedef __u64 Elf64_Off;
20 typedef __u32 Elf64_Word;
21 typedef __u64 Elf64_Xword;
190 struct elf64_sym { Elf64_Word st_name; unsigned char st_info; unsigned char st_other; Elf64_Half st_shndx; Elf64_Addr st_value; Elf64_Xword st_size; } ;
198 typedef struct elf64_sym Elf64_Sym;
219 struct elf64_hdr { unsigned char e_ident[16U]; Elf64_Half e_type; Elf64_Half e_machine; Elf64_Word e_version; Elf64_Addr e_entry; Elf64_Off e_phoff; Elf64_Off e_shoff; Elf64_Word e_flags; Elf64_Half e_ehsize; Elf64_Half e_phentsize; Elf64_Half e_phnum; Elf64_Half e_shentsize; Elf64_Half e_shnum; Elf64_Half e_shstrndx; } ;
235 typedef struct elf64_hdr Elf64_Ehdr;
314 struct elf64_shdr { Elf64_Word sh_name; Elf64_Word sh_type; Elf64_Xword sh_flags; Elf64_Addr sh_addr; Elf64_Off sh_offset; Elf64_Xword sh_size; Elf64_Word sh_link; Elf64_Word sh_info; Elf64_Xword sh_addralign; Elf64_Xword sh_entsize; } ;
326 typedef struct elf64_shdr Elf64_Shdr;
65 struct radix_tree_root ;
65 union __anonunion____missing_field_name_233 { struct list_head private_list; struct callback_head callback_head; } ;
65 struct radix_tree_node { unsigned char shift; unsigned char offset; unsigned char count; unsigned char exceptional; struct radix_tree_node *parent; struct radix_tree_root *root; union __anonunion____missing_field_name_233 __annonCompField49; void *slots[64U]; unsigned long tags[3U][1U]; } ;
107 struct radix_tree_root { gfp_t gfp_mask; struct radix_tree_node *rnode; } ;
176 struct ida { struct radix_tree_root ida_rt; } ;
216 struct dentry ;
217 struct iattr ;
218 struct super_block ;
219 struct file_system_type ;
220 struct kernfs_open_node ;
221 struct kernfs_iattrs ;
245 struct kernfs_root ;
245 struct kernfs_elem_dir { unsigned long subdirs; struct rb_root children; struct kernfs_root *root; } ;
86 struct kernfs_node ;
86 struct kernfs_elem_symlink { struct kernfs_node *target_kn; } ;
90 struct kernfs_ops ;
90 struct kernfs_elem_attr { const struct kernfs_ops *ops; struct kernfs_open_node *open; loff_t size; struct kernfs_node *notify_next; } ;
97 union __anonunion____missing_field_name_242 { struct kernfs_elem_dir dir; struct kernfs_elem_symlink symlink; struct kernfs_elem_attr attr; } ;
97 struct kernfs_node { atomic_t count; atomic_t active; struct lockdep_map dep_map; struct kernfs_node *parent; const char *name; struct rb_node rb; const void *ns; unsigned int hash; union __anonunion____missing_field_name_242 __annonCompField50; void *priv; unsigned short flags; umode_t mode; unsigned int ino; struct kernfs_iattrs *iattr; } ;
139 struct kernfs_syscall_ops { int (*remount_fs)(struct kernfs_root *, int *, char *); int (*show_options)(struct seq_file *, struct kernfs_root *); int (*mkdir)(struct kernfs_node *, const char *, umode_t ); int (*rmdir)(struct kernfs_node *); int (*rename)(struct kernfs_node *, struct kernfs_node *, const char *); int (*show_path)(struct seq_file *, struct kernfs_node *, struct kernfs_root *); } ;
158 struct kernfs_root { struct kernfs_node *kn; unsigned int flags; struct ida ino_ida; struct kernfs_syscall_ops *syscall_ops; struct list_head supers; wait_queue_head_t deactivate_waitq; } ;
174 struct kernfs_open_file { struct kernfs_node *kn; struct file *file; struct seq_file *seq_file; void *priv; struct mutex mutex; struct mutex prealloc_mutex; int event; struct list_head list; char *prealloc_buf; size_t atomic_write_len; bool mmapped; bool released; const struct vm_operations_struct *vm_ops; } ;
194 struct kernfs_ops { int (*open)(struct kernfs_open_file *); void (*release)(struct kernfs_open_file *); int (*seq_show)(struct seq_file *, void *); void * (*seq_start)(struct seq_file *, loff_t *); void * (*seq_next)(struct seq_file *, void *, loff_t *); void (*seq_stop)(struct seq_file *, void *); ssize_t (*read)(struct kernfs_open_file *, char *, size_t , loff_t ); size_t atomic_write_len; bool prealloc; ssize_t (*write)(struct kernfs_open_file *, char *, size_t , loff_t ); int (*mmap)(struct kernfs_open_file *, struct vm_area_struct *); struct lock_class_key lockdep_key; } ;
521 struct sock ;
522 struct kobject ;
523 enum kobj_ns_type { KOBJ_NS_TYPE_NONE = 0, KOBJ_NS_TYPE_NET = 1, KOBJ_NS_TYPES = 2 } ;
529 struct kobj_ns_type_operations { enum kobj_ns_type type; bool (*current_may_mount)(); void * (*grab_current_ns)(); const void * (*netlink_ns)(struct sock *); const void * (*initial_ns)(); void (*drop_ns)(void *); } ;
59 struct bin_attribute ;
60 struct attribute { const char *name; umode_t mode; bool ignore_lockdep; struct lock_class_key *key; struct lock_class_key skey; } ;
37 struct attribute_group { const char *name; umode_t (*is_visible)(struct kobject *, struct attribute *, int); umode_t (*is_bin_visible)(struct kobject *, struct bin_attribute *, int); struct attribute **attrs; struct bin_attribute **bin_attrs; } ;
92 struct bin_attribute { struct attribute attr; size_t size; void *private; ssize_t (*read)(struct file *, struct kobject *, struct bin_attribute *, char *, loff_t , size_t ); ssize_t (*write)(struct file *, struct kobject *, struct bin_attribute *, char *, loff_t , size_t ); int (*mmap)(struct file *, struct kobject *, struct bin_attribute *, struct vm_area_struct *); } ;
165 struct sysfs_ops { ssize_t (*show)(struct kobject *, struct attribute *, char *); ssize_t (*store)(struct kobject *, struct attribute *, const char *, size_t ); } ;
530 struct refcount_struct { atomic_t refs; } ;
11 typedef struct refcount_struct refcount_t;
41 struct kref { refcount_t refcount; } ;
52 struct kset ;
52 struct kobj_type ;
52 struct kobject { const char *name; struct list_head entry; struct kobject *parent; struct kset *kset; struct kobj_type *ktype; struct kernfs_node *sd; struct kref kref; struct delayed_work release; unsigned char state_initialized; unsigned char state_in_sysfs; unsigned char state_add_uevent_sent; unsigned char state_remove_uevent_sent; unsigned char uevent_suppress; } ;
115 struct kobj_type { void (*release)(struct kobject *); const struct sysfs_ops *sysfs_ops; struct attribute **default_attrs; const struct kobj_ns_type_operations * (*child_ns_type)(struct kobject *); const void * (*namespace)(struct kobject *); } ;
123 struct kobj_uevent_env { char *argv[3U]; char *envp[32U]; int envp_idx; char buf[2048U]; int buflen; } ;
131 struct kset_uevent_ops { const int (*filter)(struct kset *, struct kobject *); const const char * (*name)(struct kset *, struct kobject *); const int (*uevent)(struct kset *, struct kobject *, struct kobj_uevent_env *); } ;
148 struct kset { struct list_head list; spinlock_t list_lock; struct kobject kobj; const struct kset_uevent_ops *uevent_ops; } ;
223 struct kernel_param ;
228 struct kernel_param_ops { unsigned int flags; int (*set)(const char *, const struct kernel_param *); int (*get)(char *, const struct kernel_param *); void (*free)(void *); } ;
62 struct kparam_string ;
62 struct kparam_array ;
62 union __anonunion____missing_field_name_245 { void *arg; const struct kparam_string *str; const struct kparam_array *arr; } ;
62 struct kernel_param { const char *name; struct module *mod; const struct kernel_param_ops *ops; const u16 perm; s8 level; u8 flags; union __anonunion____missing_field_name_245 __annonCompField51; } ;
83 struct kparam_string { unsigned int maxlen; char *string; } ;
89 struct kparam_array { unsigned int max; unsigned int elemsize; unsigned int *num; const struct kernel_param_ops *ops; void *elem; } ;
470 struct latch_tree_node { struct rb_node node[2U]; } ;
211 struct mod_arch_specific { } ;
38 struct exception_table_entry ;
39 struct module_param_attrs ;
39 struct module_kobject { struct kobject kobj; struct module *mod; struct kobject *drivers_dir; struct module_param_attrs *mp; struct completion *kobj_completion; } ;
49 struct module_attribute { struct attribute attr; ssize_t (*show)(struct module_attribute *, struct module_kobject *, char *); ssize_t (*store)(struct module_attribute *, struct module_kobject *, const char *, size_t ); void (*setup)(struct module *, const char *); int (*test)(struct module *); void (*free)(struct module *); } ;
276 enum module_state { MODULE_STATE_LIVE = 0, MODULE_STATE_COMING = 1, MODULE_STATE_GOING = 2, MODULE_STATE_UNFORMED = 3 } ;
283 struct mod_tree_node { struct module *mod; struct latch_tree_node node; } ;
288 struct module_layout { void *base; unsigned int size; unsigned int text_size; unsigned int ro_size; unsigned int ro_after_init_size; struct mod_tree_node mtn; } ;
304 struct mod_kallsyms { Elf64_Sym *symtab; unsigned int num_symtab; char *strtab; } ;
318 struct klp_modinfo { Elf64_Ehdr hdr; Elf64_Shdr *sechdrs; char *secstrings; unsigned int symndx; } ;
326 struct module_sect_attrs ;
326 struct module_notes_attrs ;
326 struct trace_event_call ;
326 struct trace_enum_map ;
326 struct module { enum module_state state; struct list_head list; char name[56U]; struct module_kobject mkobj; struct module_attribute *modinfo_attrs; const char *version; const char *srcversion; struct kobject *holders_dir; const struct kernel_symbol *syms; const s32 *crcs; unsigned int num_syms; struct mutex param_lock; struct kernel_param *kp; unsigned int num_kp; unsigned int num_gpl_syms; const struct kernel_symbol *gpl_syms; const s32 *gpl_crcs; const struct kernel_symbol *unused_syms; const s32 *unused_crcs; unsigned int num_unused_syms; unsigned int num_unused_gpl_syms; const struct kernel_symbol *unused_gpl_syms; const s32 *unused_gpl_crcs; bool sig_ok; bool async_probe_requested; const struct kernel_symbol *gpl_future_syms; const s32 *gpl_future_crcs; unsigned int num_gpl_future_syms; unsigned int num_exentries; struct exception_table_entry *extable; int (*init)(); struct module_layout core_layout; struct module_layout init_layout; struct mod_arch_specific arch; unsigned long taints; unsigned int num_bugs; struct list_head bug_list; struct bug_entry *bug_table; struct mod_kallsyms *kallsyms; struct mod_kallsyms core_kallsyms; struct module_sect_attrs *sect_attrs; struct module_notes_attrs *notes_attrs; char *args; void *percpu; unsigned int percpu_size; unsigned int num_tracepoints; const struct tracepoint **tracepoints_ptrs; unsigned int num_trace_bprintk_fmt; const char **trace_bprintk_fmt_start; struct trace_event_call **trace_events; unsigned int num_trace_events; struct trace_enum_map **trace_enums; unsigned int num_trace_enums; bool klp; bool klp_alive; struct klp_modinfo *klp_info; struct list_head source_list; struct list_head target_list; void (*exit)(); atomic_t refcnt; ctor_fn_t (**ctors)(); unsigned int num_ctors; } ;
796 struct klist_node ;
797 struct klist { spinlock_t k_lock; struct list_head k_list; void (*get)(struct klist_node *); void (*put)(struct klist_node *); } ;
37 struct klist_node { void *n_klist; struct list_head n_node; struct kref n_ref; } ;
93 struct hlist_bl_node ;
93 struct hlist_bl_head { struct hlist_bl_node *first; } ;
36 struct hlist_bl_node { struct hlist_bl_node *next; struct hlist_bl_node **pprev; } ;
114 struct __anonstruct____missing_field_name_299 { spinlock_t lock; int count; } ;
114 union __anonunion____missing_field_name_298 { struct __anonstruct____missing_field_name_299 __annonCompField52; } ;
114 struct lockref { union __anonunion____missing_field_name_298 __annonCompField53; } ;
77 struct path ;
78 struct vfsmount ;
79 struct __anonstruct____missing_field_name_301 { u32 hash; u32 len; } ;
79 union __anonunion____missing_field_name_300 { struct __anonstruct____missing_field_name_301 __annonCompField54; u64 hash_len; } ;
79 struct qstr { union __anonunion____missing_field_name_300 __annonCompField55; const unsigned char *name; } ;
66 struct dentry_operations ;
66 union __anonunion____missing_field_name_302 { struct list_head d_lru; wait_queue_head_t *d_wait; } ;
66 union __anonunion_d_u_303 { struct hlist_node d_alias; struct hlist_bl_node d_in_lookup_hash; struct callback_head d_rcu; } ;
66 struct dentry { unsigned int d_flags; seqcount_t d_seq; struct hlist_bl_node d_hash; struct dentry *d_parent; struct qstr d_name; struct inode *d_inode; unsigned char d_iname[32U]; struct lockref d_lockref; const struct dentry_operations *d_op; struct super_block *d_sb; unsigned long d_time; void *d_fsdata; union __anonunion____missing_field_name_302 __annonCompField56; struct list_head d_child; struct list_head d_subdirs; union __anonunion_d_u_303 d_u; } ;
122 struct dentry_operations { int (*d_revalidate)(struct dentry *, unsigned int); int (*d_weak_revalidate)(struct dentry *, unsigned int); int (*d_hash)(const struct dentry *, struct qstr *); int (*d_compare)(const struct dentry *, unsigned int, const char *, const struct qstr *); int (*d_delete)(const struct dentry *); int (*d_init)(struct dentry *); void (*d_release)(struct dentry *); void (*d_prune)(struct dentry *); void (*d_iput)(struct dentry *, struct inode *); char * (*d_dname)(struct dentry *, char *, int); struct vfsmount * (*d_automount)(struct path *); int (*d_manage)(const struct path *, bool ); struct dentry * (*d_real)(struct dentry *, const struct inode *, unsigned int); } ;
593 struct path { struct vfsmount *mnt; struct dentry *dentry; } ;
19 struct shrink_control { gfp_t gfp_mask; unsigned long nr_to_scan; int nid; struct mem_cgroup *memcg; } ;
27 struct shrinker { unsigned long int (*count_objects)(struct shrinker *, struct shrink_control *); unsigned long int (*scan_objects)(struct shrinker *, struct shrink_control *); int seeks; long batch; unsigned long flags; struct list_head list; atomic_long_t *nr_deferred; } ;
80 struct list_lru_one { struct list_head list; long nr_items; } ;
32 struct list_lru_memcg { struct list_lru_one *lru[0U]; } ;
37 struct list_lru_node { spinlock_t lock; struct list_lru_one lru; struct list_lru_memcg *memcg_lrus; } ;
47 struct list_lru { struct list_lru_node *node; struct list_head list; } ;
189 enum pid_type { PIDTYPE_PID = 0, PIDTYPE_PGID = 1, PIDTYPE_SID = 2, PIDTYPE_MAX = 3 } ;
196 struct pid_namespace ;
196 struct upid { int nr; struct pid_namespace *ns; struct hlist_node pid_chain; } ;
56 struct pid { atomic_t count; unsigned int level; struct hlist_head tasks[3U]; struct callback_head rcu; struct upid numbers[1U]; } ;
68 struct pid_link { struct hlist_node node; struct pid *pid; } ;
22 struct kernel_cap_struct { __u32 cap[2U]; } ;
25 typedef struct kernel_cap_struct kernel_cap_t;
45 struct fiemap_extent { __u64 fe_logical; __u64 fe_physical; __u64 fe_length; __u64 fe_reserved64[2U]; __u32 fe_flags; __u32 fe_reserved[3U]; } ;
38 enum migrate_mode { MIGRATE_ASYNC = 0, MIGRATE_SYNC_LIGHT = 1, MIGRATE_SYNC = 2 } ;
44 struct rcuwait { struct task_struct *task; } ;
32 enum rcu_sync_type { RCU_SYNC = 0, RCU_SCHED_SYNC = 1, RCU_BH_SYNC = 2 } ;
38 struct rcu_sync { int gp_state; int gp_count; wait_queue_head_t gp_wait; int cb_state; struct callback_head cb_head; enum rcu_sync_type gp_type; } ;
66 struct percpu_rw_semaphore { struct rcu_sync rss; unsigned int *read_count; struct rw_semaphore rw_sem; struct rcuwait writer; int readers_block; } ;
144 struct delayed_call { void (*fn)(void *); void *arg; } ;
283 struct backing_dev_info ;
284 struct bdi_writeback ;
285 struct bio ;
286 struct export_operations ;
287 struct hd_geometry ;
289 struct kiocb ;
290 struct pipe_inode_info ;
291 struct poll_table_struct ;
292 struct kstatfs ;
293 struct swap_info_struct ;
294 struct iov_iter ;
295 struct fscrypt_info ;
296 struct fscrypt_operations ;
76 struct iattr { unsigned int ia_valid; umode_t ia_mode; kuid_t ia_uid; kgid_t ia_gid; loff_t ia_size; struct timespec ia_atime; struct timespec ia_mtime; struct timespec ia_ctime; struct file *ia_file; } ;
210 struct percpu_counter { raw_spinlock_t lock; s64 count; struct list_head list; s32 *counters; } ;
213 struct dquot ;
214 struct kqid ;
19 typedef __kernel_uid32_t projid_t;
23 struct __anonstruct_kprojid_t_305 { projid_t val; } ;
23 typedef struct __anonstruct_kprojid_t_305 kprojid_t;
181 enum quota_type { USRQUOTA = 0, GRPQUOTA = 1, PRJQUOTA = 2 } ;
66 typedef long long qsize_t;
67 union __anonunion____missing_field_name_306 { kuid_t uid; kgid_t gid; kprojid_t projid; } ;
67 struct kqid { union __anonunion____missing_field_name_306 __annonCompField57; enum quota_type type; } ;
194 struct mem_dqblk { qsize_t dqb_bhardlimit; qsize_t dqb_bsoftlimit; qsize_t dqb_curspace; qsize_t dqb_rsvspace; qsize_t dqb_ihardlimit; qsize_t dqb_isoftlimit; qsize_t dqb_curinodes; time64_t dqb_btime; time64_t dqb_itime; } ;
216 struct quota_format_type ;
217 struct mem_dqinfo { struct quota_format_type *dqi_format; int dqi_fmt_id; struct list_head dqi_dirty_list; unsigned long dqi_flags; unsigned int dqi_bgrace; unsigned int dqi_igrace; qsize_t dqi_max_spc_limit; qsize_t dqi_max_ino_limit; void *dqi_priv; } ;
282 struct dquot { struct hlist_node dq_hash; struct list_head dq_inuse; struct list_head dq_free; struct list_head dq_dirty; struct mutex dq_lock; atomic_t dq_count; wait_queue_head_t dq_wait_unused; struct super_block *dq_sb; struct kqid dq_id; loff_t dq_off; unsigned long dq_flags; struct mem_dqblk dq_dqb; } ;
309 struct quota_format_ops { int (*check_quota_file)(struct super_block *, int); int (*read_file_info)(struct super_block *, int); int (*write_file_info)(struct super_block *, int); int (*free_file_info)(struct super_block *, int); int (*read_dqblk)(struct dquot *); int (*commit_dqblk)(struct dquot *); int (*release_dqblk)(struct dquot *); int (*get_next_id)(struct super_block *, struct kqid *); } ;
321 struct dquot_operations { int (*write_dquot)(struct dquot *); struct dquot * (*alloc_dquot)(struct super_block *, int); void (*destroy_dquot)(struct dquot *); int (*acquire_dquot)(struct dquot *); int (*release_dquot)(struct dquot *); int (*mark_dirty)(struct dquot *); int (*write_info)(struct super_block *, int); qsize_t * (*get_reserved_space)(struct inode *); int (*get_projid)(struct inode *, kprojid_t *); int (*get_next_id)(struct super_block *, struct kqid *); } ;
338 struct qc_dqblk { int d_fieldmask; u64 d_spc_hardlimit; u64 d_spc_softlimit; u64 d_ino_hardlimit; u64 d_ino_softlimit; u64 d_space; u64 d_ino_count; s64 d_ino_timer; s64 d_spc_timer; int d_ino_warns; int d_spc_warns; u64 d_rt_spc_hardlimit; u64 d_rt_spc_softlimit; u64 d_rt_space; s64 d_rt_spc_timer; int d_rt_spc_warns; } ;
361 struct qc_type_state { unsigned int flags; unsigned int spc_timelimit; unsigned int ino_timelimit; unsigned int rt_spc_timelimit; unsigned int spc_warnlimit; unsigned int ino_warnlimit; unsigned int rt_spc_warnlimit; unsigned long long ino; blkcnt_t blocks; blkcnt_t nextents; } ;
407 struct qc_state { unsigned int s_incoredqs; struct qc_type_state s_state[3U]; } ;
418 struct qc_info { int i_fieldmask; unsigned int i_flags; unsigned int i_spc_timelimit; unsigned int i_ino_timelimit; unsigned int i_rt_spc_timelimit; unsigned int i_spc_warnlimit; unsigned int i_ino_warnlimit; unsigned int i_rt_spc_warnlimit; } ;
431 struct quotactl_ops { int (*quota_on)(struct super_block *, int, int, const struct path *); int (*quota_off)(struct super_block *, int); int (*quota_enable)(struct super_block *, unsigned int); int (*quota_disable)(struct super_block *, unsigned int); int (*quota_sync)(struct super_block *, int); int (*set_info)(struct super_block *, int, struct qc_info *); int (*get_dqblk)(struct super_block *, struct kqid , struct qc_dqblk *); int (*get_nextdqblk)(struct super_block *, struct kqid *, struct qc_dqblk *); int (*set_dqblk)(struct super_block *, struct kqid , struct qc_dqblk *); int (*get_state)(struct super_block *, struct qc_state *); int (*rm_xquota)(struct super_block *, unsigned int); } ;
447 struct quota_format_type { int qf_fmt_id; const struct quota_format_ops *qf_ops; struct module *qf_owner; struct quota_format_type *qf_next; } ;
511 struct quota_info { unsigned int flags; struct mutex dqio_mutex; struct inode *files[3U]; struct mem_dqinfo info[3U]; const struct quota_format_ops *ops[3U]; } ;
540 struct writeback_control ;
541 struct kiocb { struct file *ki_filp; loff_t ki_pos; void (*ki_complete)(struct kiocb *, long, long); void *private; int ki_flags; } ;
317 struct address_space_operations { int (*writepage)(struct page *, struct writeback_control *); int (*readpage)(struct file *, struct page *); int (*writepages)(struct address_space *, struct writeback_control *); int (*set_page_dirty)(struct page *); int (*readpages)(struct file *, struct address_space *, struct list_head *, unsigned int); int (*write_begin)(struct file *, struct address_space *, loff_t , unsigned int, unsigned int, struct page **, void **); int (*write_end)(struct file *, struct address_space *, loff_t , unsigned int, unsigned int, struct page *, void *); sector_t (*bmap)(struct address_space *, sector_t ); void (*invalidatepage)(struct page *, unsigned int, unsigned int); int (*releasepage)(struct page *, gfp_t ); void (*freepage)(struct page *); ssize_t (*direct_IO)(struct kiocb *, struct iov_iter *); int (*migratepage)(struct address_space *, struct page *, struct page *, enum migrate_mode ); bool (*isolate_page)(struct page *, isolate_mode_t ); void (*putback_page)(struct page *); int (*launder_page)(struct page *); int (*is_partially_uptodate)(struct page *, unsigned long, unsigned long); void (*is_dirty_writeback)(struct page *, bool *, bool *); int (*error_remove_page)(struct address_space *, struct page *); int (*swap_activate)(struct swap_info_struct *, struct file *, sector_t *); void (*swap_deactivate)(struct file *); } ;
376 struct address_space { struct inode *host; struct radix_tree_root page_tree; spinlock_t tree_lock; atomic_t i_mmap_writable; struct rb_root i_mmap; struct rw_semaphore i_mmap_rwsem; unsigned long nrpages; unsigned long nrexceptional; unsigned long writeback_index; const struct address_space_operations *a_ops; unsigned long flags; spinlock_t private_lock; gfp_t gfp_mask; struct list_head private_list; void *private_data; } ;
398 struct request_queue ;
399 struct hd_struct ;
399 struct gendisk ;
399 struct block_device { dev_t bd_dev; int bd_openers; struct inode *bd_inode; struct super_block *bd_super; struct mutex bd_mutex; void *bd_claiming; void *bd_holder; int bd_holders; bool bd_write_holder; struct list_head bd_holder_disks; struct block_device *bd_contains; unsigned int bd_block_size; struct hd_struct *bd_part; unsigned int bd_part_count; int bd_invalidated; struct gendisk *bd_disk; struct request_queue *bd_queue; struct backing_dev_info *bd_bdi; struct list_head bd_list; unsigned long bd_private; int bd_fsfreeze_count; struct mutex bd_fsfreeze_mutex; } ;
515 struct posix_acl ;
542 struct inode_operations ;
542 union __anonunion____missing_field_name_311 { const unsigned int i_nlink; unsigned int __i_nlink; } ;
542 union __anonunion____missing_field_name_312 { struct hlist_head i_dentry; struct callback_head i_rcu; } ;
542 struct file_lock_context ;
542 struct cdev ;
542 union __anonunion____missing_field_name_313 { struct pipe_inode_info *i_pipe; struct block_device *i_bdev; struct cdev *i_cdev; char *i_link; unsigned int i_dir_seq; } ;
542 struct inode { umode_t i_mode; unsigned short i_opflags; kuid_t i_uid; kgid_t i_gid; unsigned int i_flags; struct posix_acl *i_acl; struct posix_acl *i_default_acl; const struct inode_operations *i_op; struct super_block *i_sb; struct address_space *i_mapping; void *i_security; unsigned long i_ino; union __anonunion____missing_field_name_311 __annonCompField58; dev_t i_rdev; loff_t i_size; struct timespec i_atime; struct timespec i_mtime; struct timespec i_ctime; spinlock_t i_lock; unsigned short i_bytes; unsigned int i_blkbits; blkcnt_t i_blocks; unsigned long i_state; struct rw_semaphore i_rwsem; unsigned long dirtied_when; unsigned long dirtied_time_when; struct hlist_node i_hash; struct list_head i_io_list; struct bdi_writeback *i_wb; int i_wb_frn_winner; u16 i_wb_frn_avg_time; u16 i_wb_frn_history; struct list_head i_lru; struct list_head i_sb_list; struct list_head i_wb_list; union __anonunion____missing_field_name_312 __annonCompField59; u64 i_version; atomic_t i_count; atomic_t i_dio_count; atomic_t i_writecount; atomic_t i_readcount; const struct file_operations *i_fop; struct file_lock_context *i_flctx; struct address_space i_data; struct list_head i_devices; union __anonunion____missing_field_name_313 __annonCompField60; __u32 i_generation; __u32 i_fsnotify_mask; struct hlist_head i_fsnotify_marks; struct fscrypt_info *i_crypt_info; void *i_private; } ;
803 struct fown_struct { rwlock_t lock; struct pid *pid; enum pid_type pid_type; kuid_t uid; kuid_t euid; int signum; } ;
811 struct file_ra_state { unsigned long start; unsigned int size; unsigned int async_size; unsigned int ra_pages; unsigned int mmap_miss; loff_t prev_pos; } ;
834 union __anonunion_f_u_314 { struct llist_node fu_llist; struct callback_head fu_rcuhead; } ;
834 struct file { union __anonunion_f_u_314 f_u; struct path f_path; struct inode *f_inode; const struct file_operations *f_op; spinlock_t f_lock; atomic_long_t f_count; unsigned int f_flags; fmode_t f_mode; struct mutex f_pos_lock; loff_t f_pos; struct fown_struct f_owner; const struct cred *f_cred; struct file_ra_state f_ra; u64 f_version; void *f_security; void *private_data; struct list_head f_ep_links; struct list_head f_tfile_llink; struct address_space *f_mapping; } ;
919 typedef void *fl_owner_t;
920 struct file_lock ;
921 struct file_lock_operations { void (*fl_copy_lock)(struct file_lock *, struct file_lock *); void (*fl_release_private)(struct file_lock *); } ;
927 struct lock_manager_operations { int (*lm_compare_owner)(struct file_lock *, struct file_lock *); unsigned long int (*lm_owner_key)(struct file_lock *); fl_owner_t (*lm_get_owner)(fl_owner_t ); void (*lm_put_owner)(fl_owner_t ); void (*lm_notify)(struct file_lock *); int (*lm_grant)(struct file_lock *, int); bool (*lm_break)(struct file_lock *); int (*lm_change)(struct file_lock *, int, struct list_head *); void (*lm_setup)(struct file_lock *, void **); } ;
954 struct nlm_lockowner ;
955 struct nfs_lock_info { u32 state; struct nlm_lockowner *owner; struct list_head list; } ;
14 struct nfs4_lock_state ;
15 struct nfs4_lock_info { struct nfs4_lock_state *owner; } ;
19 struct fasync_struct ;
19 struct __anonstruct_afs_316 { struct list_head link; int state; } ;
19 union __anonunion_fl_u_315 { struct nfs_lock_info nfs_fl; struct nfs4_lock_info nfs4_fl; struct __anonstruct_afs_316 afs; } ;
19 struct file_lock { struct file_lock *fl_next; struct list_head fl_list; struct hlist_node fl_link; struct list_head fl_block; fl_owner_t fl_owner; unsigned int fl_flags; unsigned char fl_type; unsigned int fl_pid; int fl_link_cpu; struct pid *fl_nspid; wait_queue_head_t fl_wait; struct file *fl_file; loff_t fl_start; loff_t fl_end; struct fasync_struct *fl_fasync; unsigned long fl_break_time; unsigned long fl_downgrade_time; const struct file_lock_operations *fl_ops; const struct lock_manager_operations *fl_lmops; union __anonunion_fl_u_315 fl_u; } ;
1007 struct file_lock_context { spinlock_t flc_lock; struct list_head flc_flock; struct list_head flc_posix; struct list_head flc_lease; } ;
1074 struct files_struct ;
1227 struct fasync_struct { spinlock_t fa_lock; int magic; int fa_fd; struct fasync_struct *fa_next; struct file *fa_file; struct callback_head fa_rcu; } ;
1262 struct sb_writers { int frozen; wait_queue_head_t wait_unfrozen; struct percpu_rw_semaphore rw_sem[3U]; } ;
1292 struct super_operations ;
1292 struct xattr_handler ;
1292 struct mtd_info ;
1292 struct super_block { struct list_head s_list; dev_t s_dev; unsigned char s_blocksize_bits; unsigned long s_blocksize; loff_t s_maxbytes; struct file_system_type *s_type; const struct super_operations *s_op; const struct dquot_operations *dq_op; const struct quotactl_ops *s_qcop; const struct export_operations *s_export_op; unsigned long s_flags; unsigned long s_iflags; unsigned long s_magic; struct dentry *s_root; struct rw_semaphore s_umount; int s_count; atomic_t s_active; void *s_security; const struct xattr_handler **s_xattr; const struct fscrypt_operations *s_cop; struct hlist_bl_head s_anon; struct list_head s_mounts; struct block_device *s_bdev; struct backing_dev_info *s_bdi; struct mtd_info *s_mtd; struct hlist_node s_instances; unsigned int s_quota_types; struct quota_info s_dquot; struct sb_writers s_writers; char s_id[32U]; u8 s_uuid[16U]; void *s_fs_info; unsigned int s_max_links; fmode_t s_mode; u32 s_time_gran; struct mutex s_vfs_rename_mutex; char *s_subtype; char *s_options; const struct dentry_operations *s_d_op; int cleancache_poolid; struct shrinker s_shrink; atomic_long_t s_remove_count; int s_readonly_remount; struct workqueue_struct *s_dio_done_wq; struct hlist_head s_pins; struct user_namespace *s_user_ns; struct list_lru s_dentry_lru; struct list_lru s_inode_lru; struct callback_head rcu; struct work_struct destroy_work; struct mutex s_sync_lock; int s_stack_depth; spinlock_t s_inode_list_lock; struct list_head s_inodes; spinlock_t s_inode_wblist_lock; struct list_head s_inodes_wb; } ;
1579 struct fiemap_extent_info { unsigned int fi_flags; unsigned int fi_extents_mapped; unsigned int fi_extents_max; struct fiemap_extent *fi_extents_start; } ;
1592 struct dir_context ;
1617 struct dir_context { int (*actor)(struct dir_context *, const char *, int, loff_t , u64 , unsigned int); loff_t pos; } ;
1623 struct block_device_operations ;
1624 struct file_operations { struct module *owner; loff_t (*llseek)(struct file *, loff_t , int); ssize_t (*read)(struct file *, char *, size_t , loff_t *); ssize_t (*write)(struct file *, const char *, size_t , loff_t *); ssize_t (*read_iter)(struct kiocb *, struct iov_iter *); ssize_t (*write_iter)(struct kiocb *, struct iov_iter *); int (*iterate)(struct file *, struct dir_context *); int (*iterate_shared)(struct file *, struct dir_context *); unsigned int (*poll)(struct file *, struct poll_table_struct *); long int (*unlocked_ioctl)(struct file *, unsigned int, unsigned long); long int (*compat_ioctl)(struct file *, unsigned int, unsigned long); int (*mmap)(struct file *, struct vm_area_struct *); int (*open)(struct inode *, struct file *); int (*flush)(struct file *, fl_owner_t ); int (*release)(struct inode *, struct file *); int (*fsync)(struct file *, loff_t , loff_t , int); int (*fasync)(int, struct file *, int); int (*lock)(struct file *, int, struct file_lock *); ssize_t (*sendpage)(struct file *, struct page *, int, size_t , loff_t *, int); unsigned long int (*get_unmapped_area)(struct file *, unsigned long, unsigned long, unsigned long, unsigned long); int (*check_flags)(int); int (*flock)(struct file *, int, struct file_lock *); ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t , unsigned int); ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t , unsigned int); int (*setlease)(struct file *, long, struct file_lock **, void **); long int (*fallocate)(struct file *, int, loff_t , loff_t ); void (*show_fdinfo)(struct seq_file *, struct file *); ssize_t (*copy_file_range)(struct file *, loff_t , struct file *, loff_t , size_t , unsigned int); int (*clone_file_range)(struct file *, loff_t , struct file *, loff_t , u64 ); ssize_t (*dedupe_file_range)(struct file *, u64 , u64 , struct file *, u64 ); } ;
1692 struct inode_operations { struct dentry * (*lookup)(struct inode *, struct dentry *, unsigned int); const char * (*get_link)(struct dentry *, struct inode *, struct delayed_call *); int (*permission)(struct inode *, int); struct posix_acl * (*get_acl)(struct inode *, int); int (*readlink)(struct dentry *, char *, int); int (*create)(struct inode *, struct dentry *, umode_t , bool ); int (*link)(struct dentry *, struct inode *, struct dentry *); int (*unlink)(struct inode *, struct dentry *); int (*symlink)(struct inode *, struct dentry *, const char *); int (*mkdir)(struct inode *, struct dentry *, umode_t ); int (*rmdir)(struct inode *, struct dentry *); int (*mknod)(struct inode *, struct dentry *, umode_t , dev_t ); int (*rename)(struct inode *, struct dentry *, struct inode *, struct dentry *, unsigned int); int (*setattr)(struct dentry *, struct iattr *); int (*getattr)(const struct path *, struct kstat *, u32 , unsigned int); ssize_t (*listxattr)(struct dentry *, char *, size_t ); int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 , u64 ); int (*update_time)(struct inode *, struct timespec *, int); int (*atomic_open)(struct inode *, struct dentry *, struct file *, unsigned int, umode_t , int *); int (*tmpfile)(struct inode *, struct dentry *, umode_t ); int (*set_acl)(struct inode *, struct posix_acl *, int); } ;
1771 struct super_operations { struct inode * (*alloc_inode)(struct super_block *); void (*destroy_inode)(struct inode *); void (*dirty_inode)(struct inode *, int); int (*write_inode)(struct inode *, struct writeback_control *); int (*drop_inode)(struct inode *); void (*evict_inode)(struct inode *); void (*put_super)(struct super_block *); int (*sync_fs)(struct super_block *, int); int (*freeze_super)(struct super_block *); int (*freeze_fs)(struct super_block *); int (*thaw_super)(struct super_block *); int (*unfreeze_fs)(struct super_block *); int (*statfs)(struct dentry *, struct kstatfs *); int (*remount_fs)(struct super_block *, int *, char *); void (*umount_begin)(struct super_block *); int (*show_options)(struct seq_file *, struct dentry *); int (*show_devname)(struct seq_file *, struct dentry *); int (*show_path)(struct seq_file *, struct dentry *); int (*show_stats)(struct seq_file *, struct dentry *); ssize_t (*quota_read)(struct super_block *, int, char *, size_t , loff_t ); ssize_t (*quota_write)(struct super_block *, int, const char *, size_t , loff_t ); struct dquot ** (*get_dquots)(struct inode *); int (*bdev_try_to_free_page)(struct super_block *, struct page *, gfp_t ); long int (*nr_cached_objects)(struct super_block *, struct shrink_control *); long int (*free_cached_objects)(struct super_block *, struct shrink_control *); } ;
2014 struct file_system_type { const char *name; int fs_flags; struct dentry * (*mount)(struct file_system_type *, int, const char *, void *); void (*kill_sb)(struct super_block *); struct module *owner; struct file_system_type *next; struct hlist_head fs_supers; struct lock_class_key s_lock_key; struct lock_class_key s_umount_key; struct lock_class_key s_vfs_rename_key; struct lock_class_key s_writers_key[3U]; struct lock_class_key i_lock_key; struct lock_class_key i_mutex_key; struct lock_class_key i_mutex_dir_key; } ;
3219 struct assoc_array_ptr ;
3219 struct assoc_array { struct assoc_array_ptr *root; unsigned long nr_leaves_on_tree; } ;
31 typedef int32_t key_serial_t;
34 typedef uint32_t key_perm_t;
35 struct key ;
36 struct user_struct ;
37 struct signal_struct ;
38 struct key_type ;
42 struct keyring_index_key { struct key_type *type; const char *description; size_t desc_len; } ;
91 union key_payload { void *rcu_data0; void *data[4U]; } ;
128 union __anonunion____missing_field_name_317 { struct list_head graveyard_link; struct rb_node serial_node; } ;
128 struct key_user ;
128 union __anonunion____missing_field_name_318 { time_t expiry; time_t revoked_at; } ;
128 struct __anonstruct____missing_field_name_320 { struct key_type *type; char *description; } ;
128 union __anonunion____missing_field_name_319 { struct keyring_index_key index_key; struct __anonstruct____missing_field_name_320 __annonCompField63; } ;
128 struct __anonstruct____missing_field_name_322 { struct list_head name_link; struct assoc_array keys; } ;
128 union __anonunion____missing_field_name_321 { union key_payload payload; struct __anonstruct____missing_field_name_322 __annonCompField65; int reject_error; } ;
128 struct key { atomic_t usage; key_serial_t serial; union __anonunion____missing_field_name_317 __annonCompField61; struct rw_semaphore sem; struct key_user *user; void *security; union __anonunion____missing_field_name_318 __annonCompField62; time_t last_used_at; kuid_t uid; kgid_t gid; key_perm_t perm; unsigned short quotalen; unsigned short datalen; unsigned long flags; union __anonunion____missing_field_name_319 __annonCompField64; union __anonunion____missing_field_name_321 __annonCompField66; int (*restrict_link)(struct key *, const struct key_type *, const union key_payload *); } ;
380 struct audit_context ;
26 struct sem_undo_list ;
26 struct sysv_sem { struct sem_undo_list *undo_list; } ;
26 struct sysv_shm { struct list_head shm_clist; } ;
12 enum kcov_mode { KCOV_MODE_DISABLED = 0, KCOV_MODE_TRACE = 1 } ;
84 struct plist_node { int prio; struct list_head prio_list; struct list_head node_list; } ;
299 struct timerqueue_node { struct rb_node node; ktime_t expires; } ;
12 struct timerqueue_head { struct rb_root head; struct timerqueue_node *next; } ;
50 struct hrtimer_clock_base ;
51 struct hrtimer_cpu_base ;
60 enum hrtimer_restart { HRTIMER_NORESTART = 0, HRTIMER_RESTART = 1 } ;
65 struct hrtimer { struct timerqueue_node node; ktime_t _softexpires; enum hrtimer_restart (*function)(struct hrtimer *); struct hrtimer_clock_base *base; u8 state; u8 is_rel; } ;
113 struct hrtimer_clock_base { struct hrtimer_cpu_base *cpu_base; int index; clockid_t clockid; struct timerqueue_head active; ktime_t (*get_time)(); ktime_t offset; } ;
146 struct hrtimer_cpu_base { raw_spinlock_t lock; seqcount_t seq; struct hrtimer *running; unsigned int cpu; unsigned int active_bases; unsigned int clock_was_set_seq; bool migration_enabled; bool nohz_active; unsigned char in_hrtirq; unsigned char hres_active; unsigned char hang_detected; ktime_t expires_next; struct hrtimer *next_timer; unsigned int nr_events; unsigned int nr_retries; unsigned int nr_hangs; unsigned int max_hang_time; struct hrtimer_clock_base clock_base[4U]; } ;
43 struct seccomp_filter ;
44 struct seccomp { int mode; struct seccomp_filter *filter; } ;
11 struct latency_record { unsigned long backtrace[12U]; unsigned int count; unsigned long time; unsigned long max; } ;
24 struct __anonstruct_sigset_t_323 { unsigned long sig[1U]; } ;
24 typedef struct __anonstruct_sigset_t_323 sigset_t;
25 struct siginfo ;
38 union sigval { int sival_int; void *sival_ptr; } ;
10 typedef union sigval sigval_t;
11 struct __anonstruct__kill_325 { __kernel_pid_t _pid; __kernel_uid32_t _uid; } ;
11 struct __anonstruct__timer_326 { __kernel_timer_t _tid; int _overrun; char _pad[0U]; sigval_t _sigval; int _sys_private; } ;
11 struct __anonstruct__rt_327 { __kernel_pid_t _pid; __kernel_uid32_t _uid; sigval_t _sigval; } ;
11 struct __anonstruct__sigchld_328 { __kernel_pid_t _pid; __kernel_uid32_t _uid; int _status; __kernel_clock_t _utime; __kernel_clock_t _stime; } ;
11 struct __anonstruct__addr_bnd_331 { void *_lower; void *_upper; } ;
11 union __anonunion____missing_field_name_330 { struct __anonstruct__addr_bnd_331 _addr_bnd; __u32 _pkey; } ;
11 struct __anonstruct__sigfault_329 { void *_addr; short _addr_lsb; union __anonunion____missing_field_name_330 __annonCompField67; } ;
11 struct __anonstruct__sigpoll_332 { long _band; int _fd; } ;
11 struct __anonstruct__sigsys_333 { void *_call_addr; int _syscall; unsigned int _arch; } ;
11 union __anonunion__sifields_324 { int _pad[28U]; struct __anonstruct__kill_325 _kill; struct __anonstruct__timer_326 _timer; struct __anonstruct__rt_327 _rt; struct __anonstruct__sigchld_328 _sigchld; struct __anonstruct__sigfault_329 _sigfault; struct __anonstruct__sigpoll_332 _sigpoll; struct __anonstruct__sigsys_333 _sigsys; } ;
11 struct siginfo { int si_signo; int si_errno; int si_code; union __anonunion__sifields_324 _sifields; } ;
118 typedef struct siginfo siginfo_t;
21 struct sigpending { struct list_head list; sigset_t signal; } ;
65 struct task_io_accounting { u64 rchar; u64 wchar; u64 syscr; u64 syscw; u64 read_bytes; u64 write_bytes; u64 cancelled_write_bytes; } ;
45 struct bio_list ;
46 struct blk_plug ;
47 struct cfs_rq ;
48 struct fs_struct ;
49 struct futex_pi_state ;
50 struct io_context ;
51 struct nameidata ;
52 struct perf_event_context ;
54 struct reclaim_state ;
55 struct robust_list_head ;
58 struct sighand_struct ;
59 struct task_delay_info ;
60 struct task_group ;
187 struct prev_cputime { u64 utime; u64 stime; raw_spinlock_t lock; } ;
203 struct task_cputime { u64 utime; u64 stime; unsigned long long sum_exec_runtime; } ;
220 struct sched_info { unsigned long pcount; unsigned long long run_delay; unsigned long long last_arrival; unsigned long long last_queued; } ;
244 struct load_weight { unsigned long weight; u32 inv_weight; } ;
261 struct sched_avg { u64 last_update_time; u64 load_sum; u32 util_sum; u32 period_contrib; unsigned long load_avg; unsigned long util_avg; } ;
322 struct sched_statistics { u64 wait_start; u64 wait_max; u64 wait_count; u64 wait_sum; u64 iowait_count; u64 iowait_sum; u64 sleep_start; u64 sleep_max; s64 sum_sleep_runtime; u64 block_start; u64 block_max; u64 exec_max; u64 slice_max; u64 nr_migrations_cold; u64 nr_failed_migrations_affine; u64 nr_failed_migrations_running; u64 nr_failed_migrations_hot; u64 nr_forced_migrations; u64 nr_wakeups; u64 nr_wakeups_sync; u64 nr_wakeups_migrate; u64 nr_wakeups_local; u64 nr_wakeups_remote; u64 nr_wakeups_affine; u64 nr_wakeups_affine_attempts; u64 nr_wakeups_passive; u64 nr_wakeups_idle; } ;
357 struct sched_entity { struct load_weight load; struct rb_node run_node; struct list_head group_node; unsigned int on_rq; u64 exec_start; u64 sum_exec_runtime; u64 vruntime; u64 prev_sum_exec_runtime; u64 nr_migrations; struct sched_statistics statistics; int depth; struct sched_entity *parent; struct cfs_rq *cfs_rq; struct cfs_rq *my_q; struct sched_avg avg; } ;
393 struct rt_rq ;
393 struct sched_rt_entity { struct list_head run_list; unsigned long timeout; unsigned long watchdog_stamp; unsigned int time_slice; unsigned short on_rq; unsigned short on_list; struct sched_rt_entity *back; struct sched_rt_entity *parent; struct rt_rq *rt_rq; struct rt_rq *my_q; } ;
411 struct sched_dl_entity { struct rb_node rb_node; u64 dl_runtime; u64 dl_deadline; u64 dl_period; u64 dl_bw; s64 runtime; u64 deadline; unsigned int flags; int dl_throttled; int dl_boosted; int dl_yielded; struct hrtimer dl_timer; } ;
478 struct wake_q_node { struct wake_q_node *next; } ;
482 struct sched_class ;
482 struct rt_mutex_waiter ;
482 struct css_set ;
482 struct compat_robust_list_head ;
482 struct numa_group ;
482 struct kcov ;
482 struct task_struct { struct thread_info thread_info; volatile long state; void *stack; atomic_t usage; unsigned int flags; unsigned int ptrace; struct llist_node wake_entry; int on_cpu; unsigned int cpu; unsigned int wakee_flips; unsigned long wakee_flip_decay_ts; struct task_struct *last_wakee; int wake_cpu; int on_rq; int prio; int static_prio; int normal_prio; unsigned int rt_priority; const struct sched_class *sched_class; struct sched_entity se; struct sched_rt_entity rt; struct task_group *sched_task_group; struct sched_dl_entity dl; struct hlist_head preempt_notifiers; unsigned int policy; int nr_cpus_allowed; cpumask_t cpus_allowed; unsigned long rcu_tasks_nvcsw; bool rcu_tasks_holdout; struct list_head rcu_tasks_holdout_list; int rcu_tasks_idle_cpu; struct sched_info sched_info; struct list_head tasks; struct plist_node pushable_tasks; struct rb_node pushable_dl_tasks; struct mm_struct *mm; struct mm_struct *active_mm; struct vmacache vmacache; struct task_rss_stat rss_stat; int exit_state; int exit_code; int exit_signal; int pdeath_signal; unsigned long jobctl; unsigned int personality; unsigned char sched_reset_on_fork; unsigned char sched_contributes_to_load; unsigned char sched_migrated; unsigned char sched_remote_wakeup; unsigned char; unsigned char in_execve; unsigned char in_iowait; unsigned char restore_sigmask; unsigned char memcg_may_oom; unsigned char memcg_kmem_skip_account; unsigned char brk_randomized; unsigned long atomic_flags; struct restart_block restart_block; pid_t pid; pid_t tgid; struct task_struct *real_parent; struct task_struct *parent; struct list_head children; struct list_head sibling; struct task_struct *group_leader; struct list_head ptraced; struct list_head ptrace_entry; struct pid_link pids[3U]; struct list_head thread_group; struct list_head thread_node; struct completion *vfork_done; int *set_child_tid; int *clear_child_tid; u64 utime; u64 stime; u64 gtime; struct prev_cputime prev_cputime; unsigned long nvcsw; unsigned long nivcsw; u64 start_time; u64 real_start_time; unsigned long min_flt; unsigned long maj_flt; struct task_cputime cputime_expires; struct list_head cpu_timers[3U]; const struct cred *ptracer_cred; const struct cred *real_cred; const struct cred *cred; char comm[16U]; struct nameidata *nameidata; struct sysv_sem sysvsem; struct sysv_shm sysvshm; unsigned long last_switch_count; struct fs_struct *fs; struct files_struct *files; struct nsproxy *nsproxy; struct signal_struct *signal; struct sighand_struct *sighand; sigset_t blocked; sigset_t real_blocked; sigset_t saved_sigmask; struct sigpending pending; unsigned long sas_ss_sp; size_t sas_ss_size; unsigned int sas_ss_flags; struct callback_head *task_works; struct audit_context *audit_context; kuid_t loginuid; unsigned int sessionid; struct seccomp seccomp; u32 parent_exec_id; u32 self_exec_id; spinlock_t alloc_lock; raw_spinlock_t pi_lock; struct wake_q_node wake_q; struct rb_root pi_waiters; struct rb_node *pi_waiters_leftmost; struct rt_mutex_waiter *pi_blocked_on; struct mutex_waiter *blocked_on; unsigned int irq_events; unsigned long hardirq_enable_ip; unsigned long hardirq_disable_ip; unsigned int hardirq_enable_event; unsigned int hardirq_disable_event; int hardirqs_enabled; int hardirq_context; unsigned long softirq_disable_ip; unsigned long softirq_enable_ip; unsigned int softirq_disable_event; unsigned int softirq_enable_event; int softirqs_enabled; int softirq_context; u64 curr_chain_key; int lockdep_depth; unsigned int lockdep_recursion; struct held_lock held_locks[48U]; gfp_t lockdep_reclaim_gfp; unsigned int in_ubsan; void *journal_info; struct bio_list *bio_list; struct blk_plug *plug; struct reclaim_state *reclaim_state; struct backing_dev_info *backing_dev_info; struct io_context *io_context; unsigned long ptrace_message; siginfo_t *last_siginfo; struct task_io_accounting ioac; u64 acct_rss_mem1; u64 acct_vm_mem1; u64 acct_timexpd; nodemask_t mems_allowed; seqcount_t mems_allowed_seq; int cpuset_mem_spread_rotor; int cpuset_slab_spread_rotor; struct css_set *cgroups; struct list_head cg_list; int closid; struct robust_list_head *robust_list; struct compat_robust_list_head *compat_robust_list; struct list_head pi_state_list; struct futex_pi_state *pi_state_cache; struct perf_event_context *perf_event_ctxp[2U]; struct mutex perf_event_mutex; struct list_head perf_event_list; struct mempolicy *mempolicy; short il_next; short pref_node_fork; int numa_scan_seq; unsigned int numa_scan_period; unsigned int numa_scan_period_max; int numa_preferred_nid; unsigned long numa_migrate_retry; u64 node_stamp; u64 last_task_numa_placement; u64 last_sum_exec_runtime; struct callback_head numa_work; struct list_head numa_entry; struct numa_group *numa_group; unsigned long *numa_faults; unsigned long total_numa_faults; unsigned long numa_faults_locality[3U]; unsigned long numa_pages_migrated; struct tlbflush_unmap_batch tlb_ubc; struct callback_head rcu; struct pipe_inode_info *splice_pipe; struct page_frag task_frag; struct task_delay_info *delays; int make_it_fail; int nr_dirtied; int nr_dirtied_pause; unsigned long dirty_paused_when; int latency_record_count; struct latency_record latency_record[32U]; u64 timer_slack_ns; u64 default_timer_slack_ns; unsigned int kasan_depth; unsigned long trace; unsigned long trace_recursion; enum kcov_mode kcov_mode; unsigned int kcov_size; void *kcov_area; struct kcov *kcov; struct mem_cgroup *memcg_in_oom; gfp_t memcg_oom_gfp_mask; int memcg_oom_order; unsigned int memcg_nr_pages_over_high; struct uprobe_task *utask; unsigned int sequential_io; unsigned int sequential_io_avg; unsigned long task_state_change; int pagefault_disabled; struct task_struct *oom_reaper_list; atomic_t stack_refcount; struct thread_struct thread; } ;
1562 struct user_struct { atomic_t __count; atomic_t processes; atomic_t sigpending; atomic_t fanotify_listeners; atomic_long_t epoll_watches; unsigned long mq_bytes; unsigned long locked_shm; unsigned long unix_inflight; atomic_long_t pipe_bufs; struct key *uid_keyring; struct key *session_keyring; struct hlist_node uidhash_node; kuid_t uid; atomic_long_t locked_vm; } ;
60 struct group_info { atomic_t usage; int ngroups; kgid_t gid[0U]; } ;
86 struct cred { atomic_t usage; atomic_t subscribers; void *put_addr; unsigned int magic; kuid_t uid; kgid_t gid; kuid_t suid; kgid_t sgid; kuid_t euid; kgid_t egid; kuid_t fsuid; kgid_t fsgid; unsigned int securebits; kernel_cap_t cap_inheritable; kernel_cap_t cap_permitted; kernel_cap_t cap_effective; kernel_cap_t cap_bset; kernel_cap_t cap_ambient; unsigned char jit_keyring; struct key *session_keyring; struct key *process_keyring; struct key *thread_keyring; struct key *request_key_auth; void *security; struct user_struct *user; struct user_namespace *user_ns; struct group_info *group_info; struct callback_head rcu; } ;
369 struct seq_file { char *buf; size_t size; size_t from; size_t count; size_t pad_until; loff_t index; loff_t read_pos; u64 version; struct mutex lock; const struct seq_operations *op; int poll_event; const struct file *file; void *private; } ;
30 struct seq_operations { void * (*start)(struct seq_file *, loff_t *); void (*stop)(struct seq_file *, void *); void * (*next)(struct seq_file *, void *, loff_t *); int (*show)(struct seq_file *, void *); } ;
222 struct pinctrl ;
223 struct pinctrl_state ;
200 struct dev_pin_info { struct pinctrl *p; struct pinctrl_state *default_state; struct pinctrl_state *init_state; struct pinctrl_state *sleep_state; struct pinctrl_state *idle_state; } ;
58 struct pm_message { int event; } ;
64 typedef struct pm_message pm_message_t;
65 struct dev_pm_ops { int (*prepare)(struct device *); void (*complete)(struct device *); int (*suspend)(struct device *); int (*resume)(struct device *); int (*freeze)(struct device *); int (*thaw)(struct device *); int (*poweroff)(struct device *); int (*restore)(struct device *); int (*suspend_late)(struct device *); int (*resume_early)(struct device *); int (*freeze_late)(struct device *); int (*thaw_early)(struct device *); int (*poweroff_late)(struct device *); int (*restore_early)(struct device *); int (*suspend_noirq)(struct device *); int (*resume_noirq)(struct device *); int (*freeze_noirq)(struct device *); int (*thaw_noirq)(struct device *); int (*poweroff_noirq)(struct device *); int (*restore_noirq)(struct device *); int (*runtime_suspend)(struct device *); int (*runtime_resume)(struct device *); int (*runtime_idle)(struct device *); } ;
315 enum rpm_status { RPM_ACTIVE = 0, RPM_RESUMING = 1, RPM_SUSPENDED = 2, RPM_SUSPENDING = 3 } ;
322 enum rpm_request { RPM_REQ_NONE = 0, RPM_REQ_IDLE = 1, RPM_REQ_SUSPEND = 2, RPM_REQ_AUTOSUSPEND = 3, RPM_REQ_RESUME = 4 } ;
330 struct wakeup_source ;
331 struct wake_irq ;
332 struct pm_domain_data ;
333 struct pm_subsys_data { spinlock_t lock; unsigned int refcount; struct list_head clock_list; struct pm_domain_data *domain_data; } ;
551 struct dev_pm_qos ;
551 struct dev_pm_info { pm_message_t power_state; unsigned char can_wakeup; unsigned char async_suspend; bool in_dpm_list; bool is_prepared; bool is_suspended; bool is_noirq_suspended; bool is_late_suspended; bool early_init; bool direct_complete; spinlock_t lock; struct list_head entry; struct completion completion; struct wakeup_source *wakeup; bool wakeup_path; bool syscore; bool no_pm_callbacks; struct timer_list suspend_timer; unsigned long timer_expires; struct work_struct work; wait_queue_head_t wait_queue; struct wake_irq *wakeirq; atomic_t usage_count; atomic_t child_count; unsigned char disable_depth; unsigned char idle_notification; unsigned char request_pending; unsigned char deferred_resume; unsigned char run_wake; unsigned char runtime_auto; bool ignore_children; unsigned char no_callbacks; unsigned char irq_safe; unsigned char use_autosuspend; unsigned char timer_autosuspends; unsigned char memalloc_noio; unsigned int links_count; enum rpm_request request; enum rpm_status runtime_status; int runtime_error; int autosuspend_delay; unsigned long last_busy; unsigned long active_jiffies; unsigned long suspended_jiffies; unsigned long accounting_timestamp; struct pm_subsys_data *subsys_data; void (*set_latency_tolerance)(struct device *, s32 ); struct dev_pm_qos *qos; } ;
613 struct dev_pm_domain { struct dev_pm_ops ops; void (*detach)(struct device *, bool ); int (*activate)(struct device *); void (*sync)(struct device *); void (*dismiss)(struct device *); } ;
76 struct dev_archdata { void *iommu; } ;
8 struct dma_map_ops ;
21 struct device_private ;
22 struct device_driver ;
23 struct driver_private ;
24 struct class ;
25 struct subsys_private ;
26 struct bus_type ;
27 struct device_node ;
28 struct fwnode_handle ;
29 struct iommu_ops ;
30 struct iommu_group ;
31 struct iommu_fwspec ;
62 struct device_attribute ;
62 struct bus_type { const char *name; const char *dev_name; struct device *dev_root; struct device_attribute *dev_attrs; const struct attribute_group **bus_groups; const struct attribute_group **dev_groups; const struct attribute_group **drv_groups; int (*match)(struct device *, struct device_driver *); int (*uevent)(struct device *, struct kobj_uevent_env *); int (*probe)(struct device *); int (*remove)(struct device *); void (*shutdown)(struct device *); int (*online)(struct device *); int (*offline)(struct device *); int (*suspend)(struct device *, pm_message_t ); int (*resume)(struct device *); int (*num_vf)(struct device *); const struct dev_pm_ops *pm; const struct iommu_ops *iommu_ops; struct subsys_private *p; struct lock_class_key lock_key; } ;
147 struct device_type ;
206 enum probe_type { PROBE_DEFAULT_STRATEGY = 0, PROBE_PREFER_ASYNCHRONOUS = 1, PROBE_FORCE_SYNCHRONOUS = 2 } ;
212 struct of_device_id ;
212 struct acpi_device_id ;
212 struct device_driver { const char *name; struct bus_type *bus; struct module *owner; const char *mod_name; bool suppress_bind_attrs; enum probe_type probe_type; const struct of_device_id *of_match_table; const struct acpi_device_id *acpi_match_table; int (*probe)(struct device *); int (*remove)(struct device *); void (*shutdown)(struct device *); int (*suspend)(struct device *, pm_message_t ); int (*resume)(struct device *); const struct attribute_group **groups; const struct dev_pm_ops *pm; struct driver_private *p; } ;
362 struct class_attribute ;
362 struct class { const char *name; struct module *owner; struct class_attribute *class_attrs; const struct attribute_group **class_groups; const struct attribute_group **dev_groups; struct kobject *dev_kobj; int (*dev_uevent)(struct device *, struct kobj_uevent_env *); char * (*devnode)(struct device *, umode_t *); void (*class_release)(struct class *); void (*dev_release)(struct device *); int (*suspend)(struct device *, pm_message_t ); int (*resume)(struct device *); const struct kobj_ns_type_operations *ns_type; const void * (*namespace)(struct device *); const struct dev_pm_ops *pm; struct subsys_private *p; } ;
457 struct class_attribute { struct attribute attr; ssize_t (*show)(struct class *, struct class_attribute *, char *); ssize_t (*store)(struct class *, struct class_attribute *, const char *, size_t ); } ;
527 struct device_type { const char *name; const struct attribute_group **groups; int (*uevent)(struct device *, struct kobj_uevent_env *); char * (*devnode)(struct device *, umode_t *, kuid_t *, kgid_t *); void (*release)(struct device *); const struct dev_pm_ops *pm; } ;
555 struct device_attribute { struct attribute attr; ssize_t (*show)(struct device *, struct device_attribute *, char *); ssize_t (*store)(struct device *, struct device_attribute *, const char *, size_t ); } ;
727 struct device_dma_parameters { unsigned int max_segment_size; unsigned long segment_boundary_mask; } ;
790 enum dl_dev_state { DL_DEV_NO_DRIVER = 0, DL_DEV_PROBING = 1, DL_DEV_DRIVER_BOUND = 2, DL_DEV_UNBINDING = 3 } ;
797 struct dev_links_info { struct list_head suppliers; struct list_head consumers; enum dl_dev_state status; } ;
817 struct irq_domain ;
817 struct dma_coherent_mem ;
817 struct cma ;
817 struct device { struct device *parent; struct device_private *p; struct kobject kobj; const char *init_name; const struct device_type *type; struct mutex mutex; struct bus_type *bus; struct device_driver *driver; void *platform_data; void *driver_data; struct dev_links_info links; struct dev_pm_info power; struct dev_pm_domain *pm_domain; struct irq_domain *msi_domain; struct dev_pin_info *pins; struct list_head msi_list; int numa_node; const struct dma_map_ops *dma_ops; u64 *dma_mask; u64 coherent_dma_mask; unsigned long dma_pfn_offset; struct device_dma_parameters *dma_parms; struct list_head dma_pools; struct dma_coherent_mem *dma_mem; struct cma *cma_area; struct dev_archdata archdata; struct device_node *of_node; struct fwnode_handle *fwnode; dev_t devt; u32 id; spinlock_t devres_lock; struct list_head devres_head; struct klist_node knode_class; struct class *class; const struct attribute_group **groups; void (*release)(struct device *); struct iommu_group *iommu_group; struct iommu_fwspec *iommu_fwspec; bool offline_disabled; bool offline; } ;
976 struct wakeup_source { const char *name; struct list_head entry; spinlock_t lock; struct wake_irq *wakeirq; struct timer_list timer; unsigned long timer_expires; ktime_t total_time; ktime_t max_time; ktime_t last_time; ktime_t start_prevent_time; ktime_t prevent_sleep_time; unsigned long event_count; unsigned long active_count; unsigned long relax_count; unsigned long expire_count; unsigned long wakeup_count; bool active; bool autosleep_enabled; } ;
13 typedef unsigned long kernel_ulong_t;
14 struct pci_device_id { __u32 vendor; __u32 device; __u32 subvendor; __u32 subdevice; __u32 class; __u32 class_mask; kernel_ulong_t driver_data; } ;
187 struct acpi_device_id { __u8 id[9U]; kernel_ulong_t driver_data; __u32 cls; __u32 cls_msk; } ;
230 struct of_device_id { char name[32U]; char type[32U]; char compatible[128U]; const void *data; } ;
70 struct hotplug_slot ;
70 struct pci_slot { struct pci_bus *bus; struct list_head list; struct hotplug_slot *hotplug; unsigned char number; struct kobject kobj; } ;
108 typedef int pci_power_t;
135 typedef unsigned int pci_channel_state_t;
136 enum pci_channel_state { pci_channel_io_normal = 1, pci_channel_io_frozen = 2, pci_channel_io_perm_failure = 3 } ;
161 typedef unsigned short pci_dev_flags_t;
188 typedef unsigned short pci_bus_flags_t;
247 struct pcie_link_state ;
248 struct pci_vpd ;
249 struct pci_sriov ;
251 struct proc_dir_entry ;
251 struct pci_driver ;
251 union __anonunion____missing_field_name_352 { struct pci_sriov *sriov; struct pci_dev *physfn; } ;
251 struct pci_dev { struct list_head bus_list; struct pci_bus *bus; struct pci_bus *subordinate; void *sysdata; struct proc_dir_entry *procent; struct pci_slot *slot; unsigned int devfn; unsigned short vendor; unsigned short device; unsigned short subsystem_vendor; unsigned short subsystem_device; unsigned int class; u8 revision; u8 hdr_type; u16 aer_cap; u8 pcie_cap; u8 msi_cap; u8 msix_cap; unsigned char pcie_mpss; u8 rom_base_reg; u8 pin; u16 pcie_flags_reg; unsigned long *dma_alias_mask; struct pci_driver *driver; u64 dma_mask; struct device_dma_parameters dma_parms; pci_power_t current_state; u8 pm_cap; unsigned char pme_support; unsigned char pme_interrupt; unsigned char pme_poll; unsigned char d1_support; unsigned char d2_support; unsigned char no_d1d2; unsigned char no_d3cold; unsigned char bridge_d3; unsigned char d3cold_allowed; unsigned char mmio_always_on; unsigned char wakeup_prepared; unsigned char runtime_d3cold; unsigned char ignore_hotplug; unsigned char hotplug_user_indicators; unsigned int d3_delay; unsigned int d3cold_delay; struct pcie_link_state *link_state; pci_channel_state_t error_state; struct device dev; int cfg_size; unsigned int irq; struct resource resource[17U]; bool match_driver; unsigned char transparent; unsigned char multifunction; unsigned char is_added; unsigned char is_busmaster; unsigned char no_msi; unsigned char no_64bit_msi; unsigned char block_cfg_access; unsigned char broken_parity_status; unsigned char irq_reroute_variant; unsigned char msi_enabled; unsigned char msix_enabled; unsigned char ari_enabled; unsigned char ats_enabled; unsigned char is_managed; unsigned char needs_freset; unsigned char state_saved; unsigned char is_physfn; unsigned char is_virtfn; unsigned char reset_fn; unsigned char is_hotplug_bridge; unsigned char __aer_firmware_first_valid; unsigned char __aer_firmware_first; unsigned char broken_intx_masking; unsigned char io_window_1k; unsigned char irq_managed; unsigned char has_secondary_link; unsigned char non_compliant_bars; pci_dev_flags_t dev_flags; atomic_t enable_cnt; u32 saved_config_space[16U]; struct hlist_head saved_cap_space; struct bin_attribute *rom_attr; int rom_attr_enabled; struct bin_attribute *res_attr[17U]; struct bin_attribute *res_attr_wc[17U]; unsigned char ptm_root; unsigned char ptm_enabled; u8 ptm_granularity; const struct attribute_group **msi_irq_groups; struct pci_vpd *vpd; union __anonunion____missing_field_name_352 __annonCompField72; u16 ats_cap; u8 ats_stu; atomic_t ats_ref_cnt; phys_addr_t rom; size_t romlen; char *driver_override; } ;
419 struct pci_ops ;
419 struct msi_controller ;
482 struct pci_bus { struct list_head node; struct pci_bus *parent; struct list_head children; struct list_head devices; struct pci_dev *self; struct list_head slots; struct resource *resource[4U]; struct list_head resources; struct resource busn_res; struct pci_ops *ops; struct msi_controller *msi; void *sysdata; struct proc_dir_entry *procdir; unsigned char number; unsigned char primary; unsigned char max_bus_speed; unsigned char cur_bus_speed; char name[48U]; unsigned short bridge_ctl; pci_bus_flags_t bus_flags; struct device *bridge; struct device dev; struct bin_attribute *legacy_io; struct bin_attribute *legacy_mem; unsigned char is_added; } ;
606 struct pci_ops { int (*add_bus)(struct pci_bus *); void (*remove_bus)(struct pci_bus *); void * (*map_bus)(struct pci_bus *, unsigned int, int); int (*read)(struct pci_bus *, unsigned int, int, int, u32 *); int (*write)(struct pci_bus *, unsigned int, int, int, u32 ); } ;
636 struct pci_dynids { spinlock_t lock; struct list_head list; } ;
650 typedef unsigned int pci_ers_result_t;
660 struct pci_error_handlers { pci_ers_result_t (*error_detected)(struct pci_dev *, enum pci_channel_state ); pci_ers_result_t (*mmio_enabled)(struct pci_dev *); pci_ers_result_t (*slot_reset)(struct pci_dev *); void (*reset_notify)(struct pci_dev *, bool ); void (*resume)(struct pci_dev *); } ;
690 struct pci_driver { struct list_head node; const char *name; const struct pci_device_id *id_table; int (*probe)(struct pci_dev *, const struct pci_device_id *); void (*remove)(struct pci_dev *); int (*suspend)(struct pci_dev *, pm_message_t ); int (*suspend_late)(struct pci_dev *, pm_message_t ); int (*resume_early)(struct pci_dev *); int (*resume)(struct pci_dev *); void (*shutdown)(struct pci_dev *); int (*sriov_configure)(struct pci_dev *, int); const struct pci_error_handlers *err_handler; struct device_driver driver; struct pci_dynids dynids; } ;
1270 struct percpu_ref ;
55 typedef void percpu_ref_func_t(struct percpu_ref *);
68 struct percpu_ref { atomic_long_t count; unsigned long percpu_count_ptr; percpu_ref_func_t *release; percpu_ref_func_t *confirm_switch; bool force_atomic; struct callback_head rcu; } ;
277 struct vm_fault { struct vm_area_struct *vma; unsigned int flags; gfp_t gfp_mask; unsigned long pgoff; unsigned long address; pmd_t *pmd; pud_t *pud; pte_t orig_pte; struct page *cow_page; struct mem_cgroup *memcg; struct page *page; pte_t *pte; spinlock_t *ptl; pgtable_t prealloc_pte; } ;
340 enum page_entry_size { PE_SIZE_PTE = 0, PE_SIZE_PMD = 1, PE_SIZE_PUD = 2 } ;
346 struct vm_operations_struct { void (*open)(struct vm_area_struct *); void (*close)(struct vm_area_struct *); int (*mremap)(struct vm_area_struct *); int (*fault)(struct vm_fault *); int (*huge_fault)(struct vm_fault *, enum page_entry_size ); void (*map_pages)(struct vm_fault *, unsigned long, unsigned long); int (*page_mkwrite)(struct vm_fault *); int (*pfn_mkwrite)(struct vm_fault *); int (*access)(struct vm_area_struct *, unsigned long, void *, int, int); const char * (*name)(struct vm_area_struct *); int (*set_policy)(struct vm_area_struct *, struct mempolicy *); struct mempolicy * (*get_policy)(struct vm_area_struct *, unsigned long); struct page * (*find_special_page)(struct vm_area_struct *, unsigned long); } ;
2513 struct scatterlist { unsigned long sg_magic; unsigned long page_link; unsigned int offset; unsigned int length; dma_addr_t dma_address; unsigned int dma_length; } ;
21 struct sg_table { struct scatterlist *sgl; unsigned int nents; unsigned int orig_nents; } ;
96 enum dma_data_direction { DMA_BIDIRECTIONAL = 0, DMA_TO_DEVICE = 1, DMA_FROM_DEVICE = 2, DMA_NONE = 3 } ;
158 struct dma_map_ops { void * (*alloc)(struct device *, size_t , dma_addr_t *, gfp_t , unsigned long); void (*free)(struct device *, size_t , void *, dma_addr_t , unsigned long); int (*mmap)(struct device *, struct vm_area_struct *, void *, dma_addr_t , size_t , unsigned long); int (*get_sgtable)(struct device *, struct sg_table *, void *, dma_addr_t , size_t , unsigned long); dma_addr_t (*map_page)(struct device *, struct page *, unsigned long, size_t , enum dma_data_direction , unsigned long); void (*unmap_page)(struct device *, dma_addr_t , size_t , enum dma_data_direction , unsigned long); int (*map_sg)(struct device *, struct scatterlist *, int, enum dma_data_direction , unsigned long); void (*unmap_sg)(struct device *, struct scatterlist *, int, enum dma_data_direction , unsigned long); dma_addr_t (*map_resource)(struct device *, phys_addr_t , size_t , enum dma_data_direction , unsigned long); void (*unmap_resource)(struct device *, dma_addr_t , size_t , enum dma_data_direction , unsigned long); void (*sync_single_for_cpu)(struct device *, dma_addr_t , size_t , enum dma_data_direction ); void (*sync_single_for_device)(struct device *, dma_addr_t , size_t , enum dma_data_direction ); void (*sync_sg_for_cpu)(struct device *, struct scatterlist *, int, enum dma_data_direction ); void (*sync_sg_for_device)(struct device *, struct scatterlist *, int, enum dma_data_direction ); int (*mapping_error)(struct device *, dma_addr_t ); int (*dma_supported)(struct device *, u64 ); int (*set_dma_mask)(struct device *, u64 ); int is_phys; } ;
134 enum irqreturn { IRQ_NONE = 0, IRQ_HANDLED = 1, IRQ_WAKE_THREAD = 2 } ;
16 typedef enum irqreturn irqreturn_t;
133 struct exception_table_entry { int insn; int fixup; int handler; } ;
82 struct disk_stats { unsigned long sectors[2U]; unsigned long ios[2U]; unsigned long merges[2U]; unsigned long ticks[2U]; unsigned long io_ticks; unsigned long time_in_queue; } ;
91 struct partition_meta_info { char uuid[37U]; u8 volname[64U]; } ;
103 struct hd_struct { sector_t start_sect; sector_t nr_sects; seqcount_t nr_sects_seq; sector_t alignment_offset; unsigned int discard_alignment; struct device __dev; struct kobject *holder_dir; int policy; int partno; struct partition_meta_info *info; int make_it_fail; unsigned long stamp; atomic_t in_flight[2U]; struct disk_stats *dkstats; struct percpu_ref ref; struct callback_head callback_head; } ;
137 struct disk_part_tbl { struct callback_head callback_head; int len; struct hd_struct *last_lookup; struct hd_struct *part[]; } ;
155 struct disk_events ;
156 struct badblocks ;
157 struct blk_integrity_profile ;
157 struct blk_integrity { struct blk_integrity_profile *profile; unsigned char flags; unsigned char tuple_size; unsigned char interval_exp; unsigned char tag_size; } ;
168 struct disk_devt { atomic_t count; void (*release)(struct disk_devt *); } ;
177 struct timer_rand_state ;
177 struct gendisk { int major; int first_minor; int minors; struct disk_devt *disk_devt; char disk_name[32U]; char * (*devnode)(struct gendisk *, umode_t *); unsigned int events; unsigned int async_events; struct disk_part_tbl *part_tbl; struct hd_struct part0; const struct block_device_operations *fops; struct request_queue *queue; void *private_data; int flags; struct kobject *slave_dir; struct timer_rand_state *random; atomic_t sync_io; struct disk_events *ev; struct kobject integrity_kobj; int node_id; struct badblocks *bb; } ;
72 struct fprop_local_percpu { struct percpu_counter events; unsigned int period; raw_spinlock_t lock; } ;
33 typedef int congested_fn(void *, int);
42 struct bdi_writeback_congested { unsigned long state; atomic_t refcnt; struct backing_dev_info *bdi; int blkcg_id; struct rb_node rb_node; } ;
61 struct cgroup_subsys_state ;
61 union __anonunion____missing_field_name_374 { struct work_struct release_work; struct callback_head rcu; } ;
61 struct bdi_writeback { struct backing_dev_info *bdi; unsigned long state; unsigned long last_old_flush; struct list_head b_dirty; struct list_head b_io; struct list_head b_more_io; struct list_head b_dirty_time; spinlock_t list_lock; struct percpu_counter stat[4U]; struct bdi_writeback_congested *congested; unsigned long bw_time_stamp; unsigned long dirtied_stamp; unsigned long written_stamp; unsigned long write_bandwidth; unsigned long avg_write_bandwidth; unsigned long dirty_ratelimit; unsigned long balanced_dirty_ratelimit; struct fprop_local_percpu completions; int dirty_exceeded; spinlock_t work_lock; struct list_head work_list; struct delayed_work dwork; unsigned long dirty_sleep; struct list_head bdi_node; struct percpu_ref refcnt; struct fprop_local_percpu memcg_completions; struct cgroup_subsys_state *memcg_css; struct cgroup_subsys_state *blkcg_css; struct list_head memcg_node; struct list_head blkcg_node; union __anonunion____missing_field_name_374 __annonCompField81; } ;
137 struct backing_dev_info { struct list_head bdi_list; unsigned long ra_pages; unsigned long io_pages; congested_fn *congested_fn; void *congested_data; char *name; struct kref refcnt; unsigned int capabilities; unsigned int min_ratio; unsigned int max_ratio; unsigned int max_prop_frac; atomic_long_t tot_write_bandwidth; struct bdi_writeback wb; struct list_head wb_list; struct radix_tree_root cgwb_tree; struct rb_root cgwb_congested_tree; atomic_t usage_cnt; wait_queue_head_t wb_waitq; struct device *dev; struct device *owner; struct timer_list laptop_mode_wb_timer; struct dentry *debug_dir; struct dentry *debug_stats; } ;
12 typedef void * mempool_alloc_t(gfp_t , void *);
13 typedef void mempool_free_t(void *, void *);
14 struct mempool_s { spinlock_t lock; int min_nr; int curr_nr; void **elements; void *pool_data; mempool_alloc_t *alloc; mempool_free_t *free; wait_queue_head_t wait; } ;
25 typedef struct mempool_s mempool_t;
79 union __anonunion____missing_field_name_375 { struct list_head q_node; struct kmem_cache *__rcu_icq_cache; } ;
79 union __anonunion____missing_field_name_376 { struct hlist_node ioc_node; struct callback_head __rcu_head; } ;
79 struct io_cq { struct request_queue *q; struct io_context *ioc; union __anonunion____missing_field_name_375 __annonCompField82; union __anonunion____missing_field_name_376 __annonCompField83; unsigned int flags; } ;
92 struct io_context { atomic_long_t refcount; atomic_t active_ref; atomic_t nr_tasks; spinlock_t lock; unsigned short ioprio; int nr_batch_requests; unsigned long last_waited; struct radix_tree_root icq_tree; struct io_cq *icq_hint; struct hlist_head icq_list; struct work_struct release_work; } ;
77 struct bio_vec { struct page *bv_page; unsigned int bv_len; unsigned int bv_offset; } ;
34 struct bvec_iter { sector_t bi_sector; unsigned int bi_size; unsigned int bi_idx; unsigned int bi_bvec_done; } ;
84 struct bio_set ;
85 struct bio_integrity_payload ;
18 typedef void bio_end_io_t(struct bio *);
19 union __anonunion____missing_field_name_377 { struct bio_integrity_payload *bi_integrity; } ;
19 struct bio { struct bio *bi_next; struct block_device *bi_bdev; int bi_error; unsigned int bi_opf; unsigned short bi_flags; unsigned short bi_ioprio; struct bvec_iter bi_iter; unsigned int bi_phys_segments; unsigned int bi_seg_front_size; unsigned int bi_seg_back_size; atomic_t __bi_remaining; bio_end_io_t *bi_end_io; void *bi_private; struct io_context *bi_ioc; struct cgroup_subsys_state *bi_css; union __anonunion____missing_field_name_377 __annonCompField84; unsigned short bi_vcnt; unsigned short bi_max_vecs; atomic_t __bi_cnt; struct bio_vec *bi_io_vec; struct bio_set *bi_pool; struct bio_vec bi_inline_vecs[0U]; } ;
250 typedef unsigned int blk_qc_t;
285 struct blk_issue_stat { u64 time; } ;
289 struct blk_rq_stat { s64 mean; u64 min; u64 max; s32 nr_samples; s32 nr_batch; u64 batch; s64 time; } ;
303 struct bio_integrity_payload { struct bio *bip_bio; struct bvec_iter bip_iter; bio_end_io_t *bip_end_io; unsigned short bip_slab; unsigned short bip_vcnt; unsigned short bip_max_vcnt; unsigned short bip_flags; struct work_struct bip_work; struct bio_vec *bip_vec; struct bio_vec bip_inline_vecs[0U]; } ;
544 struct bio_list { struct bio *head; struct bio *tail; } ;
676 struct bio_set { struct kmem_cache *bio_slab; unsigned int front_pad; mempool_t *bio_pool; mempool_t *bvec_pool; mempool_t *bio_integrity_pool; mempool_t *bvec_integrity_pool; spinlock_t rescue_lock; struct bio_list rescue_list; struct work_struct rescue_work; struct workqueue_struct *rescue_workqueue; } ;
64 struct bsg_class_device { struct device *class_dev; struct device *parent; int minor; struct request_queue *queue; struct kref ref; void (*release)(struct device *); } ;
131 struct elevator_queue ;
133 struct request ;
135 struct bsg_job ;
136 struct blkcg_gq ;
137 struct blk_flush_queue ;
138 struct pr_ops ;
139 struct rq_wb ;
53 typedef void rq_end_io_fn(struct request *, int);
54 struct request_list { struct request_queue *q; struct blkcg_gq *blkg; int count[2U]; int starved[2U]; mempool_t *rq_pool; wait_queue_head_t wait[2U]; unsigned int flags; } ;
76 typedef __u32 req_flags_t;
77 union __anonunion____missing_field_name_378 { struct call_single_data csd; u64 fifo_time; } ;
77 struct blk_mq_ctx ;
77 union __anonunion____missing_field_name_379 { struct hlist_node hash; struct list_head ipi_list; } ;
77 union __anonunion____missing_field_name_380 { struct rb_node rb_node; struct bio_vec special_vec; void *completion_data; } ;
77 struct __anonstruct_elv_382 { struct io_cq *icq; void *priv[2U]; } ;
77 struct __anonstruct_flush_383 { unsigned int seq; struct list_head list; rq_end_io_fn *saved_end_io; } ;
77 union __anonunion____missing_field_name_381 { struct __anonstruct_elv_382 elv; struct __anonstruct_flush_383 flush; } ;
77 struct request { struct list_head queuelist; union __anonunion____missing_field_name_378 __annonCompField85; struct request_queue *q; struct blk_mq_ctx *mq_ctx; int cpu; unsigned int cmd_flags; req_flags_t rq_flags; int internal_tag; unsigned long atomic_flags; unsigned int __data_len; int tag; sector_t __sector; struct bio *bio; struct bio *biotail; union __anonunion____missing_field_name_379 __annonCompField86; union __anonunion____missing_field_name_380 __annonCompField87; union __anonunion____missing_field_name_381 __annonCompField88; struct gendisk *rq_disk; struct hd_struct *part; unsigned long start_time; struct blk_issue_stat issue_stat; struct request_list *rl; unsigned long long start_time_ns; unsigned long long io_start_time_ns; unsigned short nr_phys_segments; unsigned short nr_integrity_segments; unsigned short ioprio; void *special; int errors; unsigned int extra_len; unsigned long deadline; struct list_head timeout_list; unsigned int timeout; int retries; rq_end_io_fn *end_io; void *end_io_data; struct request *next_rq; } ;
117 struct elevator_type ;
118 enum elv_merge { ELEVATOR_NO_MERGE = 0, ELEVATOR_FRONT_MERGE = 1, ELEVATOR_BACK_MERGE = 2, ELEVATOR_DISCARD_MERGE = 3 } ;
22 typedef enum elv_merge elevator_merge_fn(struct request_queue *, struct request **, struct bio *);
25 typedef void elevator_merge_req_fn(struct request_queue *, struct request *, struct request *);
27 typedef void elevator_merged_fn(struct request_queue *, struct request *, enum elv_merge );
29 typedef int elevator_allow_bio_merge_fn(struct request_queue *, struct request *, struct bio *);
32 typedef int elevator_allow_rq_merge_fn(struct request_queue *, struct request *, struct request *);
35 typedef void elevator_bio_merged_fn(struct request_queue *, struct request *, struct bio *);
38 typedef int elevator_dispatch_fn(struct request_queue *, int);
40 typedef void elevator_add_req_fn(struct request_queue *, struct request *);
41 typedef struct request * elevator_request_list_fn(struct request_queue *, struct request *);
42 typedef void elevator_completed_req_fn(struct request_queue *, struct request *);
43 typedef int elevator_may_queue_fn(struct request_queue *, unsigned int);
45 typedef void elevator_init_icq_fn(struct io_cq *);
46 typedef void elevator_exit_icq_fn(struct io_cq *);
47 typedef int elevator_set_req_fn(struct request_queue *, struct request *, struct bio *, gfp_t );
49 typedef void elevator_put_req_fn(struct request *);
50 typedef void elevator_activate_req_fn(struct request_queue *, struct request *);
51 typedef void elevator_deactivate_req_fn(struct request_queue *, struct request *);
53 typedef int elevator_init_fn(struct request_queue *, struct elevator_type *);
55 typedef void elevator_exit_fn(struct elevator_queue *);
56 typedef void elevator_registered_fn(struct request_queue *);
57 struct elevator_ops { elevator_merge_fn *elevator_merge_fn; elevator_merged_fn *elevator_merged_fn; elevator_merge_req_fn *elevator_merge_req_fn; elevator_allow_bio_merge_fn *elevator_allow_bio_merge_fn; elevator_allow_rq_merge_fn *elevator_allow_rq_merge_fn; elevator_bio_merged_fn *elevator_bio_merged_fn; elevator_dispatch_fn *elevator_dispatch_fn; elevator_add_req_fn *elevator_add_req_fn; elevator_activate_req_fn *elevator_activate_req_fn; elevator_deactivate_req_fn *elevator_deactivate_req_fn; elevator_completed_req_fn *elevator_completed_req_fn; elevator_request_list_fn *elevator_former_req_fn; elevator_request_list_fn *elevator_latter_req_fn; elevator_init_icq_fn *elevator_init_icq_fn; elevator_exit_icq_fn *elevator_exit_icq_fn; elevator_set_req_fn *elevator_set_req_fn; elevator_put_req_fn *elevator_put_req_fn; elevator_may_queue_fn *elevator_may_queue_fn; elevator_init_fn *elevator_init_fn; elevator_exit_fn *elevator_exit_fn; elevator_registered_fn *elevator_registered_fn; } ;
89 struct blk_mq_alloc_data ;
90 struct blk_mq_hw_ctx ;
91 struct elevator_mq_ops { int (*init_sched)(struct request_queue *, struct elevator_type *); void (*exit_sched)(struct elevator_queue *); bool (*allow_merge)(struct request_queue *, struct request *, struct bio *); bool (*bio_merge)(struct blk_mq_hw_ctx *, struct bio *); int (*request_merge)(struct request_queue *, struct request **, struct bio *); void (*request_merged)(struct request_queue *, struct request *, enum elv_merge ); void (*requests_merged)(struct request_queue *, struct request *, struct request *); struct request * (*get_request)(struct request_queue *, unsigned int, struct blk_mq_alloc_data *); void (*put_request)(struct request *); void (*insert_requests)(struct blk_mq_hw_ctx *, struct list_head *, bool ); struct request * (*dispatch_request)(struct blk_mq_hw_ctx *); bool (*has_work)(struct blk_mq_hw_ctx *); void (*completed_request)(struct blk_mq_hw_ctx *, struct request *); void (*started_request)(struct request *); void (*requeue_request)(struct request *); struct request * (*former_request)(struct request_queue *, struct request *); struct request * (*next_request)(struct request_queue *, struct request *); int (*get_rq_priv)(struct request_queue *, struct request *, struct bio *); void (*put_rq_priv)(struct request_queue *, struct request *); void (*init_icq)(struct io_cq *); void (*exit_icq)(struct io_cq *); } ;
117 struct elv_fs_entry { struct attribute attr; ssize_t (*show)(struct elevator_queue *, char *); ssize_t (*store)(struct elevator_queue *, const char *, size_t ); } ;
125 union __anonunion_ops_384 { struct elevator_ops sq; struct elevator_mq_ops mq; } ;
125 struct elevator_type { struct kmem_cache *icq_cache; union __anonunion_ops_384 ops; size_t icq_size; size_t icq_align; struct elv_fs_entry *elevator_attrs; char elevator_name[16U]; struct module *elevator_owner; bool uses_mq; char icq_cache_name[21U]; struct list_head list; } ;
157 struct elevator_queue { struct elevator_type *type; void *elevator_data; struct kobject kobj; struct mutex sysfs_lock; unsigned char registered; unsigned char uses_mq; struct hlist_head hash[64U]; } ;
261 typedef void request_fn_proc(struct request_queue *);
262 typedef blk_qc_t make_request_fn(struct request_queue *, struct bio *);
263 typedef int prep_rq_fn(struct request_queue *, struct request *);
264 typedef void unprep_rq_fn(struct request_queue *, struct request *);
267 typedef void softirq_done_fn(struct request *);
268 typedef int dma_drain_needed_fn(struct request *);
269 typedef int lld_busy_fn(struct request_queue *);
270 typedef int bsg_job_fn(struct bsg_job *);
271 typedef int init_rq_fn(struct request_queue *, struct request *, gfp_t );
272 typedef void exit_rq_fn(struct request_queue *, struct request *);
273 enum blk_eh_timer_return { BLK_EH_NOT_HANDLED = 0, BLK_EH_HANDLED = 1, BLK_EH_RESET_TIMER = 2 } ;
280 typedef enum blk_eh_timer_return rq_timed_out_fn(struct request *);
286 struct blk_queue_tag { struct request **tag_index; unsigned long *tag_map; int max_depth; int real_max_depth; atomic_t refcnt; int alloc_policy; int next_tag; } ;
296 enum blk_zoned_model { BLK_ZONED_NONE = 0, BLK_ZONED_HA = 1, BLK_ZONED_HM = 2 } ;
302 struct queue_limits { unsigned long bounce_pfn; unsigned long seg_boundary_mask; unsigned long virt_boundary_mask; unsigned int max_hw_sectors; unsigned int max_dev_sectors; unsigned int chunk_sectors; unsigned int max_sectors; unsigned int max_segment_size; unsigned int physical_block_size; unsigned int alignment_offset; unsigned int io_min; unsigned int io_opt; unsigned int max_discard_sectors; unsigned int max_hw_discard_sectors; unsigned int max_write_same_sectors; unsigned int max_write_zeroes_sectors; unsigned int discard_granularity; unsigned int discard_alignment; unsigned short logical_block_size; unsigned short max_segments; unsigned short max_integrity_segments; unsigned short max_discard_segments; unsigned char misaligned; unsigned char discard_misaligned; unsigned char cluster; unsigned char discard_zeroes_data; unsigned char raid_partial_stripes_expensive; enum blk_zoned_model zoned; } ;
361 struct blk_mq_ops ;
361 struct throtl_data ;
361 struct blk_mq_tag_set ;
361 struct request_queue { struct list_head queue_head; struct request *last_merge; struct elevator_queue *elevator; int nr_rqs[2U]; int nr_rqs_elvpriv; struct rq_wb *rq_wb; struct request_list root_rl; request_fn_proc *request_fn; make_request_fn *make_request_fn; prep_rq_fn *prep_rq_fn; unprep_rq_fn *unprep_rq_fn; softirq_done_fn *softirq_done_fn; rq_timed_out_fn *rq_timed_out_fn; dma_drain_needed_fn *dma_drain_needed; lld_busy_fn *lld_busy_fn; init_rq_fn *init_rq_fn; exit_rq_fn *exit_rq_fn; const struct blk_mq_ops *mq_ops; unsigned int *mq_map; struct blk_mq_ctx *queue_ctx; unsigned int nr_queues; unsigned int queue_depth; struct blk_mq_hw_ctx **queue_hw_ctx; unsigned int nr_hw_queues; sector_t end_sector; struct request *boundary_rq; struct delayed_work delay_work; struct backing_dev_info *backing_dev_info; struct disk_devt *disk_devt; void *queuedata; unsigned long queue_flags; int id; gfp_t bounce_gfp; spinlock_t __queue_lock; spinlock_t *queue_lock; struct kobject kobj; struct kobject mq_kobj; struct blk_integrity integrity; struct device *dev; int rpm_status; unsigned int nr_pending; unsigned long nr_requests; unsigned int nr_congestion_on; unsigned int nr_congestion_off; unsigned int nr_batching; unsigned int dma_drain_size; void *dma_drain_buffer; unsigned int dma_pad_mask; unsigned int dma_alignment; struct blk_queue_tag *queue_tags; struct list_head tag_busy_list; unsigned int nr_sorted; unsigned int in_flight[2U]; struct blk_rq_stat rq_stats[2U]; unsigned int request_fn_active; unsigned int rq_timeout; int poll_nsec; struct timer_list timeout; struct work_struct timeout_work; struct list_head timeout_list; struct list_head icq_list; unsigned long blkcg_pols[1U]; struct blkcg_gq *root_blkg; struct list_head blkg_list; struct queue_limits limits; unsigned int sg_timeout; unsigned int sg_reserved_size; int node; struct blk_flush_queue *fq; struct list_head requeue_list; spinlock_t requeue_lock; struct delayed_work requeue_work; struct mutex sysfs_lock; int bypass_depth; atomic_t mq_freeze_depth; bsg_job_fn *bsg_job_fn; int bsg_job_size; struct bsg_class_device bsg_dev; struct throtl_data *td; struct callback_head callback_head; wait_queue_head_t mq_freeze_wq; struct percpu_ref q_usage_counter; struct list_head all_q_node; struct blk_mq_tag_set *tag_set; struct list_head tag_set_list; struct bio_set *bio_split; struct dentry *debugfs_dir; struct dentry *mq_debugfs_dir; bool mq_sysfs_init_done; size_t cmd_size; void *rq_alloc_data; } ;
1241 struct blk_plug { struct list_head list; struct list_head mq_list; struct list_head cb_list; } ;
1744 struct blk_integrity_iter { void *prot_buf; void *data_buf; sector_t seed; unsigned int data_size; unsigned short interval; const char *disk_name; } ;
1773 typedef int integrity_processing_fn(struct blk_integrity_iter *);
1774 struct blk_integrity_profile { integrity_processing_fn *generate_fn; integrity_processing_fn *verify_fn; const char *name; } ;
1933 struct block_device_operations { int (*open)(struct block_device *, fmode_t ); void (*release)(struct gendisk *, fmode_t ); int (*rw_page)(struct block_device *, sector_t , struct page *, bool ); int (*ioctl)(struct block_device *, fmode_t , unsigned int, unsigned long); int (*compat_ioctl)(struct block_device *, fmode_t , unsigned int, unsigned long); long int (*direct_access)(struct block_device *, sector_t , void **, pfn_t *, long); unsigned int (*check_events)(struct gendisk *, unsigned int); int (*media_changed)(struct gendisk *); void (*unlock_native_capacity)(struct gendisk *); int (*revalidate_disk)(struct gendisk *); int (*getgeo)(struct block_device *, struct hd_geometry *); void (*swap_slot_free_notify)(struct block_device *, unsigned long); struct module *owner; const struct pr_ops *pr_ops; } ;
68 struct scsi_cmnd ;
25 enum scsi_device_state { SDEV_CREATED = 1, SDEV_RUNNING = 2, SDEV_CANCEL = 3, SDEV_DEL = 4, SDEV_QUIESCE = 5, SDEV_OFFLINE = 6, SDEV_TRANSPORT_OFFLINE = 7, SDEV_BLOCK = 8, SDEV_CREATED_BLOCK = 9 } ;
78 struct Scsi_Host ;
78 struct scsi_target ;
78 struct scsi_device_handler ;
78 struct scsi_device { struct Scsi_Host *host; struct request_queue *request_queue; struct list_head siblings; struct list_head same_target_siblings; atomic_t device_busy; atomic_t device_blocked; spinlock_t list_lock; struct list_head cmd_list; struct list_head starved_entry; unsigned short queue_depth; unsigned short max_queue_depth; unsigned short last_queue_full_depth; unsigned short last_queue_full_count; unsigned long last_queue_full_time; unsigned long queue_ramp_up_period; unsigned long last_queue_ramp_up; unsigned int id; unsigned int channel; u64 lun; unsigned int manufacturer; unsigned int sector_size; void *hostdata; char type; char scsi_level; char inq_periph_qual; struct mutex inquiry_mutex; unsigned char inquiry_len; unsigned char *inquiry; const char *vendor; const char *model; const char *rev; int vpd_pg83_len; unsigned char *vpd_pg83; int vpd_pg80_len; unsigned char *vpd_pg80; unsigned char current_tag; struct scsi_target *sdev_target; unsigned int sdev_bflags; unsigned int eh_timeout; unsigned char removable; unsigned char changed; unsigned char busy; unsigned char lockable; unsigned char locked; unsigned char borken; unsigned char disconnect; unsigned char soft_reset; unsigned char sdtr; unsigned char wdtr; unsigned char ppr; unsigned char tagged_supported; unsigned char simple_tags; unsigned char was_reset; unsigned char expecting_cc_ua; unsigned char use_10_for_rw; unsigned char use_10_for_ms; unsigned char no_report_opcodes; unsigned char no_write_same; unsigned char use_16_for_rw; unsigned char skip_ms_page_8; unsigned char skip_ms_page_3f; unsigned char skip_vpd_pages; unsigned char try_vpd_pages; unsigned char use_192_bytes_for_3f; unsigned char no_start_on_add; unsigned char allow_restart; unsigned char manage_start_stop; unsigned char start_stop_pwr_cond; unsigned char no_uld_attach; unsigned char select_no_atn; unsigned char fix_capacity; unsigned char guess_capacity; unsigned char retry_hwerror; unsigned char last_sector_bug; unsigned char no_read_disc_info; unsigned char no_read_capacity_16; unsigned char try_rc_10_first; unsigned char is_visible; unsigned char wce_default_on; unsigned char no_dif; unsigned char broken_fua; unsigned char lun_in_cdb; unsigned char synchronous_alua; atomic_t disk_events_disable_depth; unsigned long supported_events[1U]; unsigned long pending_events[1U]; struct list_head event_list; struct work_struct event_work; unsigned int max_device_blocked; atomic_t iorequest_cnt; atomic_t iodone_cnt; atomic_t ioerr_cnt; struct device sdev_gendev; struct device sdev_dev; struct execute_work ew; struct work_struct requeue_work; struct scsi_device_handler *handler; void *handler_data; unsigned char access_state; enum scsi_device_state sdev_state; unsigned long sdev_data[0U]; } ;
237 enum scsi_target_state { STARGET_CREATED = 1, STARGET_RUNNING = 2, STARGET_REMOVE = 3, STARGET_DEL = 4 } ;
244 struct scsi_target { struct scsi_device *starget_sdev_user; struct list_head siblings; struct list_head devices; struct device dev; struct kref reap_ref; unsigned int channel; unsigned int id; unsigned char create; unsigned char single_lun; unsigned char pdt_1f_for_no_lun; unsigned char no_report_luns; unsigned char expecting_lun_change; atomic_t target_busy; atomic_t target_blocked; unsigned int can_queue; unsigned int max_target_blocked; char scsi_level; enum scsi_target_state state; void *hostdata; unsigned long starget_data[0U]; } ;
548 struct sbitmap_word { unsigned long word; unsigned long depth; } ;
40 struct sbitmap { unsigned int depth; unsigned int shift; unsigned int map_nr; struct sbitmap_word *map; } ;
402 struct blk_mq_tags ;
403 struct __anonstruct____missing_field_name_386 { spinlock_t lock; struct list_head dispatch; unsigned long state; } ;
403 struct blk_mq_hw_ctx { struct __anonstruct____missing_field_name_386 __annonCompField89; struct work_struct run_work; cpumask_var_t cpumask; int next_cpu; int next_cpu_batch; unsigned long flags; void *sched_data; struct request_queue *queue; struct blk_flush_queue *fq; void *driver_data; struct sbitmap ctx_map; struct blk_mq_ctx **ctxs; unsigned int nr_ctx; wait_queue_t dispatch_wait; atomic_t wait_index; struct blk_mq_tags *tags; struct blk_mq_tags *sched_tags; struct srcu_struct queue_rq_srcu; unsigned long queued; unsigned long run; unsigned long dispatched[7U]; unsigned int numa_node; unsigned int queue_num; atomic_t nr_active; struct delayed_work delay_work; struct hlist_node cpuhp_dead; struct kobject kobj; unsigned long poll_considered; unsigned long poll_invoked; unsigned long poll_success; } ;
63 struct blk_mq_tag_set { unsigned int *mq_map; const struct blk_mq_ops *ops; unsigned int nr_hw_queues; unsigned int queue_depth; unsigned int reserved_tags; unsigned int cmd_size; int numa_node; unsigned int timeout; unsigned int flags; void *driver_data; struct blk_mq_tags **tags; struct mutex tag_list_lock; struct list_head tag_list; } ;
81 struct blk_mq_queue_data { struct request *rq; struct list_head *list; bool last; } ;
88 typedef int queue_rq_fn(struct blk_mq_hw_ctx *, const struct blk_mq_queue_data *);
89 typedef enum blk_eh_timer_return timeout_fn(struct request *, bool );
90 typedef int init_hctx_fn(struct blk_mq_hw_ctx *, void *, unsigned int);
91 typedef void exit_hctx_fn(struct blk_mq_hw_ctx *, unsigned int);
92 typedef int init_request_fn(void *, struct request *, unsigned int, unsigned int, unsigned int);
94 typedef void exit_request_fn(void *, struct request *, unsigned int, unsigned int);
96 typedef int reinit_request_fn(void *, struct request *);
101 typedef int poll_fn(struct blk_mq_hw_ctx *, unsigned int);
102 typedef int map_queues_fn(struct blk_mq_tag_set *);
103 struct blk_mq_ops { queue_rq_fn *queue_rq; timeout_fn *timeout; poll_fn *poll; softirq_done_fn *complete; init_hctx_fn *init_hctx; exit_hctx_fn *exit_hctx; init_request_fn *init_request; exit_request_fn *exit_request; reinit_request_fn *reinit_request; map_queues_fn *map_queues; } ;
268 struct scsi_request { unsigned char __cmd[16U]; unsigned char *cmd; unsigned short cmd_len; unsigned int sense_len; unsigned int resid_len; void *sense; } ;
30 struct scsi_data_buffer { struct sg_table table; unsigned int length; int resid; } ;
40 struct scsi_pointer { char *ptr; int this_residual; struct scatterlist *buffer; int buffers_residual; dma_addr_t dma_handle; volatile int Status; volatile int Message; volatile int have_data_in; volatile int sent_command; volatile int phase; } ;
56 struct scsi_cmnd { struct scsi_request req; struct scsi_device *device; struct list_head list; struct list_head eh_entry; struct delayed_work abort_work; int eh_eflags; unsigned long serial_number; unsigned long jiffies_at_alloc; int retries; int allowed; unsigned char prot_op; unsigned char prot_type; unsigned char prot_flags; unsigned short cmd_len; enum dma_data_direction sc_data_direction; unsigned char *cmnd; struct scsi_data_buffer sdb; struct scsi_data_buffer *prot_sdb; unsigned int underflow; unsigned int transfersize; struct request *request; unsigned char *sense_buffer; void (*scsi_done)(struct scsi_cmnd *); struct scsi_pointer SCp; unsigned char *host_scribble; int result; int flags; unsigned char tag; } ;
353 struct scsi_host_cmd_pool ;
354 struct scsi_transport_template ;
356 struct scsi_host_template { struct module *module; const char *name; int (*detect)(struct scsi_host_template *); int (*release)(struct Scsi_Host *); const char * (*info)(struct Scsi_Host *); int (*ioctl)(struct scsi_device *, int, void *); int (*compat_ioctl)(struct scsi_device *, int, void *); int (*queuecommand)(struct Scsi_Host *, struct scsi_cmnd *); int (*eh_abort_handler)(struct scsi_cmnd *); int (*eh_device_reset_handler)(struct scsi_cmnd *); int (*eh_target_reset_handler)(struct scsi_cmnd *); int (*eh_bus_reset_handler)(struct scsi_cmnd *); int (*eh_host_reset_handler)(struct scsi_cmnd *); int (*slave_alloc)(struct scsi_device *); int (*slave_configure)(struct scsi_device *); void (*slave_destroy)(struct scsi_device *); int (*target_alloc)(struct scsi_target *); void (*target_destroy)(struct scsi_target *); int (*scan_finished)(struct Scsi_Host *, unsigned long); void (*scan_start)(struct Scsi_Host *); int (*change_queue_depth)(struct scsi_device *, int); int (*map_queues)(struct Scsi_Host *); int (*bios_param)(struct scsi_device *, struct block_device *, sector_t , int *); void (*unlock_native_capacity)(struct scsi_device *); int (*show_info)(struct seq_file *, struct Scsi_Host *); int (*write_info)(struct Scsi_Host *, char *, int); enum blk_eh_timer_return (*eh_timed_out)(struct scsi_cmnd *); int (*host_reset)(struct Scsi_Host *, int); const char *proc_name; struct proc_dir_entry *proc_dir; int can_queue; int this_id; unsigned short sg_tablesize; unsigned short sg_prot_tablesize; unsigned int max_sectors; unsigned long dma_boundary; short cmd_per_lun; unsigned char present; int tag_alloc_policy; unsigned char track_queue_depth; unsigned char supported_mode; unsigned char unchecked_isa_dma; unsigned char use_clustering; unsigned char emulated; unsigned char skip_settle_delay; unsigned char no_write_same; unsigned char no_async_abort; unsigned int max_host_blocked; struct device_attribute **shost_attrs; struct device_attribute **sdev_attrs; struct list_head legacy_hosts; u64 vendor_id; unsigned int cmd_size; struct scsi_host_cmd_pool *cmd_pool; } ;
507 enum scsi_host_state { SHOST_CREATED = 1, SHOST_RUNNING = 2, SHOST_CANCEL = 3, SHOST_DEL = 4, SHOST_RECOVERY = 5, SHOST_CANCEL_RECOVERY = 6, SHOST_DEL_RECOVERY = 7 } ;
517 union __anonunion____missing_field_name_387 { struct blk_queue_tag *bqt; struct blk_mq_tag_set tag_set; } ;
517 struct Scsi_Host { struct list_head __devices; struct list_head __targets; struct list_head starved_list; spinlock_t default_lock; spinlock_t *host_lock; struct mutex scan_mutex; struct list_head eh_cmd_q; struct task_struct *ehandler; struct completion *eh_action; wait_queue_head_t host_wait; struct scsi_host_template *hostt; struct scsi_transport_template *transportt; union __anonunion____missing_field_name_387 __annonCompField90; atomic_t host_busy; atomic_t host_blocked; unsigned int host_failed; unsigned int host_eh_scheduled; unsigned int host_no; int eh_deadline; unsigned long last_reset; unsigned int max_channel; unsigned int max_id; u64 max_lun; unsigned int unique_id; unsigned short max_cmd_len; int this_id; int can_queue; short cmd_per_lun; unsigned short sg_tablesize; unsigned short sg_prot_tablesize; unsigned int max_sectors; unsigned long dma_boundary; unsigned int nr_hw_queues; unsigned long cmd_serial_number; unsigned char active_mode; unsigned char unchecked_isa_dma; unsigned char use_clustering; unsigned char host_self_blocked; unsigned char reverse_ordering; unsigned char tmf_in_progress; unsigned char async_scan; unsigned char eh_noresume; unsigned char no_write_same; unsigned char use_blk_mq; unsigned char use_cmd_list; unsigned char short_inquiry; char work_q_name[20U]; struct workqueue_struct *work_q; struct workqueue_struct *tmf_work_q; unsigned char no_scsi2_lun_in_cdb; unsigned int max_host_blocked; unsigned int prot_capabilities; unsigned char prot_guard_type; struct request_queue *uspace_req_q; unsigned long base; unsigned long io_port; unsigned char n_io_port; unsigned char dma_channel; unsigned int irq; enum scsi_host_state shost_state; struct device shost_gendev; struct device shost_dev; struct list_head sht_legacy_list; void *shost_data; struct device *dma_dev; unsigned long hostdata[0U]; } ;
931 struct attribute_container { struct list_head node; struct klist containers; struct class *class; const struct attribute_group *grp; struct device_attribute **attrs; int (*match)(struct attribute_container *, struct device *); unsigned long flags; } ;
71 struct transport_container ;
43 struct transport_container { struct attribute_container ac; const struct attribute_group *statistics; } ;
100 struct scsi_transport_template { struct transport_container host_attrs; struct transport_container target_attrs; struct transport_container device_attrs; int (*user_scan)(struct Scsi_Host *, uint , uint , u64 ); int device_size; int device_private_offset; int target_size; int target_private_offset; int host_size; unsigned char create_work_queue; void (*eh_strategy_handler)(struct Scsi_Host *); } ;
200 enum mvumi_qc_result { MV_QUEUE_COMMAND_RESULT_SENT = 0, MV_QUEUE_COMMAND_RESULT_NO_RESOURCE = 1 } ;
205 struct mvumi_hw_regs { void *main_int_cause_reg; void *enpointa_mask_reg; void *enpointb_mask_reg; void *rstoutn_en_reg; void *ctrl_sts_reg; void *rstoutn_mask_reg; void *sys_soft_rst_reg; void *pciea_to_arm_drbl_reg; void *arm_to_pciea_drbl_reg; void *arm_to_pciea_mask_reg; void *pciea_to_arm_msg0; void *pciea_to_arm_msg1; void *arm_to_pciea_msg0; void *arm_to_pciea_msg1; void *reset_request; void *reset_enable; void *inb_list_basel; void *inb_list_baseh; void *inb_aval_count_basel; void *inb_aval_count_baseh; void *inb_write_pointer; void *inb_read_pointer; void *outb_list_basel; void *outb_list_baseh; void *outb_copy_basel; void *outb_copy_baseh; void *outb_copy_pointer; void *outb_read_pointer; void *inb_isr_cause; void *outb_isr_cause; void *outb_coal_cfg; void *outb_coal_timeout; u32 int_comaout; u32 int_comaerr; u32 int_dl_cpu2pciea; u32 int_mu; u32 int_drbl_int_mask; u32 int_main_int_mask; u32 cl_pointer_toggle; u32 cl_slot_num_mask; u32 clic_irq; u32 clic_in_err; u32 clic_out_err; } ;
104 struct mvumi_dyn_list_entry { u32 src_low_addr; u32 src_high_addr; u32 if_length; u32 reserve; } ;
126 struct mvumi_hotplug_event { u16 size; u8 dummy[2U]; u8 bitmap[0U]; } ;
151 struct mvumi_driver_event { u32 time_stamp; u32 sequence_no; u32 event_id; u8 severity; u8 param_count; u16 device_id; u32 params[4U]; u8 sense_data_length; u8 Reserved1; u8 sense_data[30U]; } ;
164 struct mvumi_event_req { unsigned char count; unsigned char reserved[3U]; struct mvumi_driver_event events[6U]; } ;
170 struct mvumi_hba ;
170 struct mvumi_events_wq { struct work_struct work_q; struct mvumi_hba *mhba; unsigned int event; void *param; } ;
177 struct mvumi_sgl { u32 baseaddr_l; u32 baseaddr_h; u32 flags; u32 size; } ;
193 struct mvumi_compact_sgl { u32 baseaddr_l; u32 baseaddr_h; u32 flags; } ;
198 struct mvumi_res { struct list_head entry; dma_addr_t bus_addr; void *virt_addr; unsigned int size; unsigned short type; } ;
234 enum resource_type { RESOURCE_CACHED_MEMORY = 0, RESOURCE_UNCACHED_MEMORY = 1 } ;
258 struct mvumi_msg_frame ;
258 struct mvumi_cmd { struct list_head queue_pointer; struct mvumi_msg_frame *frame; dma_addr_t frame_phys; struct scsi_cmnd *scmd; atomic_t sync_cmd; void *data_buf; unsigned short request_id; unsigned char cmd_status; } ;
272 struct mvumi_msg_frame { u16 device_id; u16 tag; u8 cmd_flag; u8 req_function; u8 cdb_length; u8 sg_counts; u32 data_transfer_length; u16 request_id; u16 reserved1; u8 cdb[16U]; u32 payload[1U]; } ;
291 struct mvumi_rsp_frame { u16 device_id; u16 tag; u8 req_status; u8 rsp_flag; u16 request_id; u32 payload[1U]; } ;
306 struct mvumi_ob_data { struct list_head list; unsigned char data[0U]; } ;
311 struct version_info { u32 ver_major; u32 ver_minor; u32 ver_oem; u32 ver_build; } ;
385 struct mvumi_hs_header { u8 page_code; u8 checksum; u16 frame_length; u32 frame_content[1U]; } ;
392 struct mvumi_hs_page1 { u8 pagecode; u8 checksum; u16 frame_length; u16 number_of_ports; u16 max_devices_support; u16 max_io_support; u16 umi_ver; u32 max_transfer_size; struct version_info fw_ver; u8 cl_in_max_entry_size; u8 cl_out_max_entry_size; u8 cl_inout_list_depth; u8 total_pages; u16 capability; u16 reserved1; } ;
431 struct mvumi_hs_page2 { u8 pagecode; u8 checksum; u16 frame_length; u8 host_type; u8 host_cap; u8 reserved[2U]; struct version_info host_ver; u32 system_io_bus; u32 slot_number; u32 intr_level; u32 intr_vector; u64 seconds_since1970; } ;
448 struct mvumi_hs_page3 { u8 pagecode; u8 checksum; u16 frame_length; u16 control; u8 reserved[2U]; u32 host_bufferaddr_l; u32 host_bufferaddr_h; u32 host_eventaddr_l; u32 host_eventaddr_h; } ;
461 struct mvumi_hs_page4 { u8 pagecode; u8 checksum; u16 frame_length; u32 ib_baseaddr_l; u32 ib_baseaddr_h; u32 ob_baseaddr_l; u32 ob_baseaddr_h; u8 ib_entry_size; u8 ob_entry_size; u8 ob_depth; u8 ib_depth; } ;
475 struct mvumi_tag { unsigned short *stack; unsigned short top; unsigned short size; } ;
481 struct mvumi_device { struct list_head list; struct scsi_device *sdev; u64 wwid; u8 dev_type; int id; } ;
489 struct mvumi_instance_template ;
489 struct mvumi_hba { void *base_addr[6U]; u32 pci_base[6U]; void *mmio; struct list_head cmd_pool; struct Scsi_Host *shost; wait_queue_head_t int_cmd_wait_q; struct pci_dev *pdev; unsigned int unique_id; atomic_t fw_outstanding; struct mvumi_instance_template *instancet; void *ib_list; dma_addr_t ib_list_phys; void *ib_frame; dma_addr_t ib_frame_phys; void *ob_list; dma_addr_t ob_list_phys; void *ib_shadow; dma_addr_t ib_shadow_phys; void *ob_shadow; dma_addr_t ob_shadow_phys; void *handshake_page; dma_addr_t handshake_page_phys; unsigned int global_isr; unsigned int isr_status; unsigned short max_sge; unsigned short max_target_id; unsigned char *target_map; unsigned int max_io; unsigned int list_num_io; unsigned int ib_max_size; unsigned int ob_max_size; unsigned int ib_max_size_setting; unsigned int ob_max_size_setting; unsigned int max_transfer_size; unsigned char hba_total_pages; unsigned char fw_flag; unsigned char request_id_enabled; unsigned char eot_flag; unsigned short hba_capability; unsigned short io_seq; unsigned int ib_cur_slot; unsigned int ob_cur_slot; unsigned int fw_state; struct mutex sas_discovery_mutex; struct list_head ob_data_list; struct list_head free_ob_list; struct list_head res_list; struct list_head waiting_req_list; struct mvumi_tag tag_pool; struct mvumi_cmd **tag_cmd; struct mvumi_hw_regs *regs; struct mutex device_lock; struct list_head mhba_dev_list; struct list_head shost_dev_list; struct task_struct *dm_thread; atomic_t pnp_count; } ;
559 struct mvumi_instance_template { void (*fire_cmd)(struct mvumi_hba *, struct mvumi_cmd *); void (*enable_intr)(struct mvumi_hba *); void (*disable_intr)(struct mvumi_hba *); int (*clear_intr)(void *); unsigned int (*read_fw_status_reg)(struct mvumi_hba *); unsigned int (*check_ib_list)(struct mvumi_hba *); int (*check_ob_list)(struct mvumi_hba *, unsigned int *, unsigned int *); int (*reset_host)(struct mvumi_hba *); } ;
1 void * __builtin_memcpy(void *, const void *, unsigned long);
1 long int __builtin_expect(long, long);
252 void __read_once_size(const volatile void *p, void *res, int size);
277 void __write_once_size(volatile void *p, void *res, int size);
34 extern struct module __this_module;
28 unsigned long int find_next_zero_bit(const unsigned long *, unsigned long, unsigned long);
42 unsigned long int find_first_bit(const unsigned long *, unsigned long);
172 int printk(const char *, ...);
63 void __dynamic_dev_dbg(struct _ddebug *, const struct device *, const char *, ...);
191 void __might_sleep(const char *, int, int);
3 bool ldv_is_err(const void *ptr);
8 void ldv_dma_map_page();
25 void INIT_LIST_HEAD(struct list_head *list);
32 bool __list_add_valid(struct list_head *, struct list_head *, struct list_head *);
35 bool __list_del_entry_valid(struct list_head *);
55 void __list_add(struct list_head *new, struct list_head *prev, struct list_head *next);
76 void list_add(struct list_head *new, struct list_head *head);
90 void list_add_tail(struct list_head *new, struct list_head *head);
102 void __list_del(struct list_head *prev, struct list_head *next);
114 void __list_del_entry(struct list_head *entry);
122 void list_del(struct list_head *entry);
156 void list_del_init(struct list_head *entry);
178 void list_move_tail(struct list_head *list, struct list_head *head);
200 int list_empty(const struct list_head *head);
87 void __bad_percpu_size();
10 extern struct task_struct *current_task;
12 struct task_struct * get_current();
7 extern unsigned long page_offset_base;
9 extern unsigned long vmemmap_base;
23 unsigned long int __phys_addr(unsigned long);
12 void __xchg_wrong_size();
24 int atomic_read(const atomic_t *v);
36 void atomic_set(atomic_t *v, int i);
89 void atomic_inc(atomic_t *v);
101 void atomic_dec(atomic_t *v);
32 void * __memcpy(void *, const void *, size_t );
57 void * __memset(void *, int, size_t );
41 bool IS_ERR(const void *ptr);
281 void lockdep_init_map(struct lockdep_map *, const char *, struct lock_class_key *, int);
32 unsigned long int _raw_spin_lock_irqsave(raw_spinlock_t *);
43 void _raw_spin_unlock_irqrestore(raw_spinlock_t *, unsigned long);
286 raw_spinlock_t * spinlock_check(spinlock_t *lock);
352 void spin_unlock_irqrestore(spinlock_t *lock, unsigned long flags);
9 extern struct timezone sys_tz;
73 void __init_waitqueue_head(wait_queue_head_t *, const char *, struct lock_class_key *);
201 void __wake_up(wait_queue_head_t *, unsigned int, int, void *);
252 void init_wait_entry(wait_queue_t *, int);
983 long int prepare_to_wait_event(wait_queue_head_t *, wait_queue_t *, int);
984 void finish_wait(wait_queue_head_t *, wait_queue_t *);
133 void __mutex_init(struct mutex *, const char *, struct lock_class_key *);
155 void mutex_lock_nested(struct mutex *, unsigned int);
195 void mutex_unlock(struct mutex *);
78 extern volatile unsigned long jiffies;
59 time64_t ktime_get_real_seconds();
193 void __init_work(struct work_struct *, int);
365 extern struct workqueue_struct *system_wq;
443 bool queue_work_on(int, struct workqueue_struct *, struct work_struct *);
484 bool queue_work(struct workqueue_struct *wq, struct work_struct *work);
543 bool schedule_work(struct work_struct *work);
31 unsigned int ioread32(void *);
41 void iowrite32(u32 , void *);
84 void pci_iounmap(struct pci_dev *, void *);
17 void * pci_iomap(struct pci_dev *, int, unsigned long);
175 long int schedule_timeout(long);
180 void schedule();
1386 int wake_up_process(struct task_struct *);
1026 void * dev_get_drvdata(const struct device *dev);
1031 void dev_set_drvdata(struct device *dev, void *data);
1261 void dev_err(const struct device *, const char *, ...);
1263 void dev_warn(const struct device *, const char *, ...);
154 void kfree(const void *);
330 void * __kmalloc(size_t , gfp_t );
478 void * kmalloc(size_t size, gfp_t flags);
661 void * kzalloc(size_t size, gfp_t flags);
923 int pci_bus_read_config_dword(struct pci_bus *, unsigned int, int, u32 *);
929 int pci_bus_write_config_dword(struct pci_bus *, unsigned int, int, u32 );
951 int pci_read_config_dword(const struct pci_dev *dev, int where, u32 *val);
964 int pci_write_config_dword(const struct pci_dev *dev, int where, u32 val);
1011 int pci_enable_device(struct pci_dev *);
1028 void pci_disable_device(struct pci_dev *);
1031 void pci_set_master(struct pci_dev *);
1084 int pci_save_state(struct pci_dev *);
1085 void pci_restore_state(struct pci_dev *);
1098 int pci_set_power_state(struct pci_dev *, pci_power_t );
1099 pci_power_t pci_choose_state(struct pci_dev *, pm_message_t );
1102 int __pci_enable_wake(struct pci_dev *, pci_power_t , bool , bool );
1113 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable);
1157 int pci_request_regions(struct pci_dev *, const char *);
1159 void pci_release_regions(struct pci_dev *);
1212 int __pci_register_driver(struct pci_driver *, struct module *, const char *);
1221 void pci_unregister_driver(struct pci_driver *);
1020 void * lowmem_page_address(const struct page *page);
120 struct page * sg_page(struct scatterlist *sg);
239 void * sg_virt(struct scatterlist *sg);
246 struct scatterlist * sg_next(struct scatterlist *);
1650 void * pci_get_drvdata(struct pci_dev *pdev);
1655 void pci_set_drvdata(struct pci_dev *pdev, void *data);
37 void debug_dma_map_page(struct device *, struct page *, size_t , size_t , int, dma_addr_t , bool );
44 void debug_dma_unmap_page(struct device *, dma_addr_t , size_t , int, bool );
47 void debug_dma_map_sg(struct device *, struct scatterlist *, int, int, int);
50 void debug_dma_unmap_sg(struct device *, struct scatterlist *, int, int);
53 void debug_dma_alloc_coherent(struct device *, size_t , dma_addr_t , void *);
131 void kmemcheck_mark_initialized(void *address, unsigned int n);
144 int valid_dma_direction(int dma_direction);
28 extern const struct dma_map_ops *dma_ops;
30 const struct dma_map_ops * get_arch_dma_ops(struct bus_type *bus);
35 bool arch_dma_alloc_attrs(struct device **, gfp_t *);
39 int dma_supported(struct device *, u64 );
175 const struct dma_map_ops * get_dma_ops(struct device *dev);
200 dma_addr_t ldv_dma_map_single_attrs_5(struct device *dev, void *ptr, size_t size, enum dma_data_direction dir, unsigned long attrs);
200 dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, size_t size, enum dma_data_direction dir, unsigned long attrs);
223 void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, size_t size, enum dma_data_direction dir, unsigned long attrs);
240 int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs);
258 void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction dir, unsigned long attrs);
476 void * dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs);
517 void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag);
523 void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle);
575 int dma_set_mask(struct device *dev, u64 mask);
680 void * dma_zalloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag);
16 void * pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
23 void * pci_zalloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
31 void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
38 dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
44 void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
65 int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction);
72 void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction);
113 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
139 int request_threaded_irq(unsigned int, irqreturn_t (*)(int, void *), irqreturn_t (*)(int, void *), unsigned long, const char *, void *);
144 int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *), unsigned long flags, const char *name, void *dev);
158 void free_irq(unsigned int, void *);
10 void __const_udelay(unsigned long);
57 void msleep(unsigned int);
59 void usleep_range(unsigned long, unsigned long);
64 void scsi_build_sense_buffer(int, u8 *, u8 , u8 , u8 );
236 void scmd_printk(const char *, const struct scsi_cmnd *, const char *, ...);
311 int scsi_add_device(struct Scsi_Host *, uint , uint , u64 );
314 void scsi_remove_device(struct scsi_device *);
320 void scsi_device_put(struct scsi_device *);
321 struct scsi_device * scsi_device_lookup(struct Scsi_Host *, uint , uint , u64 );
173 unsigned int scsi_sg_count(struct scsi_cmnd *cmd);
178 struct scatterlist * scsi_sglist(struct scsi_cmnd *cmd);
183 unsigned int scsi_bufflen(struct scsi_cmnd *cmd);
754 void * shost_priv(struct Scsi_Host *shost);
787 struct Scsi_Host * scsi_host_alloc(struct scsi_host_template *, int);
788 int scsi_add_host_with_dma(struct Scsi_Host *, struct device *, struct device *);
792 void scsi_rescan_device(struct device *);
793 void scsi_remove_host(struct Scsi_Host *);
795 void scsi_host_put(struct Scsi_Host *);
798 void scsi_cmd_get_serial(struct Scsi_Host *, struct scsi_cmnd *);
800 int scsi_add_host(struct Scsi_Host *host, struct device *dev);
8 struct task_struct * kthread_create_on_node(int (*)(void *), void *, int, const char *, ...);
54 int kthread_stop(struct task_struct *);
55 bool kthread_should_stop();
53 const struct pci_device_id mvumi_pci_table[3U] = { { 6987U, 37187U, 4294967295U, 4294967295U, 0U, 0U, 0UL }, { 6987U, 38272U, 4294967295U, 4294967295U, 0U, 0U, 0UL }, { 0U, 0U, 0U, 0U, 0U, 0U, 0UL } };
59 const struct pci_device_id __mod_pci__mvumi_pci_table_device_table[3U] = { };
61 void tag_init(struct mvumi_tag *st, unsigned short size);
70 unsigned short int tag_get_one(struct mvumi_hba *mhba, struct mvumi_tag *st);
76 void tag_release_one(struct mvumi_hba *mhba, struct mvumi_tag *st, unsigned short tag);
83 bool tag_is_empty(struct mvumi_tag *st);
91 void mvumi_unmap_pci_addr(struct pci_dev *dev, void **addr_array);
101 int mvumi_map_pci_addr(struct pci_dev *dev, void **addr_array);
123 struct mvumi_res * mvumi_alloc_mem_resource(struct mvumi_hba *mhba, enum resource_type type, unsigned int size);
172 void mvumi_release_mem_resource(struct mvumi_hba *mhba);
205 int mvumi_make_sgl(struct mvumi_hba *mhba, struct scsi_cmnd *scmd, void *sgl_p, unsigned char *sg_count);
252 int mvumi_internal_cmd_sgl(struct mvumi_hba *mhba, struct mvumi_cmd *cmd, unsigned int size);
278 struct mvumi_cmd * mvumi_create_internal_cmd(struct mvumi_hba *mhba, unsigned int buf_size);
314 void mvumi_delete_internal_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd);
344 struct mvumi_cmd * mvumi_get_cmd(struct mvumi_hba *mhba);
363 void mvumi_return_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd);
374 void mvumi_free_cmds(struct mvumi_hba *mhba);
393 int mvumi_alloc_cmds(struct mvumi_hba *mhba);
430 unsigned int mvumi_check_ib_list_9143(struct mvumi_hba *mhba);
452 unsigned int mvumi_check_ib_list_9580(struct mvumi_hba *mhba);
463 void mvumi_get_ib_list_entry(struct mvumi_hba *mhba, void **ib_entry);
484 void mvumi_send_ib_list_entry(struct mvumi_hba *mhba);
490 char mvumi_check_ob_frame(struct mvumi_hba *mhba, unsigned int cur_obf, struct mvumi_rsp_frame *p_outb_frame);
517 int mvumi_check_ob_list_9143(struct mvumi_hba *mhba, unsigned int *cur_obf, unsigned int *assign_obf_end);
538 int mvumi_check_ob_list_9580(struct mvumi_hba *mhba, unsigned int *cur_obf, unsigned int *assign_obf_end);
555 void mvumi_receive_ob_list_entry(struct mvumi_hba *mhba);
609 void mvumi_reset(struct mvumi_hba *mhba);
620 unsigned char mvumi_start(struct mvumi_hba *mhba);
622 int mvumi_wait_for_outstanding(struct mvumi_hba *mhba);
633 int mvumi_wait_for_fw(struct mvumi_hba *mhba);
658 void mvumi_backup_bar_addr(struct mvumi_hba *mhba);
668 void mvumi_restore_bar_addr(struct mvumi_hba *mhba);
679 unsigned int mvumi_pci_set_master(struct pci_dev *pdev);
693 int mvumi_reset_host_9580(struct mvumi_hba *mhba);
720 int mvumi_reset_host_9143(struct mvumi_hba *mhba);
725 int mvumi_host_reset(struct scsi_cmnd *scmd);
737 int mvumi_issue_blocked_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd);
782 void mvumi_release_fw(struct mvumi_hba *mhba);
793 unsigned char mvumi_flush_cache(struct mvumi_hba *mhba);
842 unsigned char mvumi_calculate_checksum(struct mvumi_hs_header *p_header, unsigned short len);
857 void mvumi_hs_build_page(struct mvumi_hba *mhba, struct mvumi_hs_header *hs_header);
935 int mvumi_init_data(struct mvumi_hba *mhba);
1064 int mvumi_hs_process_page(struct mvumi_hba *mhba, struct mvumi_hs_header *hs_header);
1118 int mvumi_handshake(struct mvumi_hba *mhba);
1237 unsigned char mvumi_handshake_event(struct mvumi_hba *mhba);
1265 unsigned char mvumi_check_handshake(struct mvumi_hba *mhba);
1326 void mvumi_complete_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd, struct mvumi_rsp_frame *ob_frame);
1373 void mvumi_complete_internal_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd, struct mvumi_rsp_frame *ob_frame);
1391 void mvumi_show_event(struct mvumi_hba *mhba, struct mvumi_driver_event *ptr);
1417 int mvumi_handle_hotplug(struct mvumi_hba *mhba, u16 devid, int status);
1449 u64 mvumi_inquiry(struct mvumi_hba *mhba, unsigned int id, struct mvumi_cmd *cmd);
1499 void mvumi_detach_devices(struct mvumi_hba *mhba);
1535 void mvumi_rescan_devices(struct mvumi_hba *mhba, int id);
1546 int mvumi_match_devices(struct mvumi_hba *mhba, int id, u64 wwid);
1569 void mvumi_remove_devices(struct mvumi_hba *mhba, int id);
1586 int mvumi_probe_devices(struct mvumi_hba *mhba);
1643 int mvumi_rescan_bus(void *data);
1683 void mvumi_proc_msg(struct mvumi_hba *mhba, struct mvumi_hotplug_event *param);
1715 void mvumi_notification(struct mvumi_hba *mhba, u8 msg, void *buffer);
1737 int mvumi_get_event(struct mvumi_hba *mhba, unsigned char msg);
1769 void mvumi_scan_events(struct work_struct *work);
1778 void mvumi_launch_events(struct mvumi_hba *mhba, u32 isr_status);
1802 void mvumi_handle_clob(struct mvumi_hba *mhba);
1828 irqreturn_t mvumi_isr_handler(int irq, void *devp);
1860 enum mvumi_qc_result mvumi_send_command(struct mvumi_hba *mhba, struct mvumi_cmd *cmd);
1898 void mvumi_fire_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd);
1936 void mvumi_enable_intr(struct mvumi_hba *mhba);
1951 void mvumi_disable_intr(struct mvumi_hba *mhba);
1963 int mvumi_clear_intr(void *extend);
2009 unsigned int mvumi_read_fw_status_reg(struct mvumi_hba *mhba);
2019 struct mvumi_instance_template mvumi_instance_9143 = { &mvumi_fire_cmd, &mvumi_enable_intr, &mvumi_disable_intr, &mvumi_clear_intr, &mvumi_read_fw_status_reg, &mvumi_check_ib_list_9143, &mvumi_check_ob_list_9143, &mvumi_reset_host_9143 };
2030 struct mvumi_instance_template mvumi_instance_9580 = { &mvumi_fire_cmd, &mvumi_enable_intr, &mvumi_disable_intr, &mvumi_clear_intr, &mvumi_read_fw_status_reg, &mvumi_check_ib_list_9580, &mvumi_check_ob_list_9580, &mvumi_reset_host_9580 };
2041 int mvumi_slave_configure(struct scsi_device *sdev);
2063 unsigned char mvumi_build_frame(struct mvumi_hba *mhba, struct scsi_cmnd *scmd, struct mvumi_cmd *cmd);
2120 int mvumi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd);
2154 enum blk_eh_timer_return mvumi_timed_out(struct scsi_cmnd *scmd);
2196 int mvumi_bios_param(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int *geom);
2223 struct scsi_host_template mvumi_template = { &__this_module, "Marvell Storage Controller", 0, 0, 0, 0, 0, &mvumi_queue_command, 0, 0, 0, 0, &mvumi_host_reset, 0, &mvumi_slave_configure, 0, 0, 0, 0, 0, 0, 0, &mvumi_bios_param, 0, 0, 0, &mvumi_timed_out, 0, 0, 0, 0, -1, (unsigned short)0, (unsigned short)0, 0U, 0UL, (short)0, 0U, 0, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 0, 0, { 0, 0 }, 0ULL, 0U, 0 };
2235 int mvumi_cfg_hw_reg(struct mvumi_hba *mhba);
2359 int mvumi_init_fw(struct mvumi_hba *mhba);
2436 int mvumi_io_attach(struct mvumi_hba *mhba);
2503 int mvumi_probe_one(struct pci_dev *pdev, const struct pci_device_id *id);
2594 void mvumi_detach_one(struct pci_dev *pdev);
2622 void mvumi_shutdown(struct pci_dev *pdev);
2629 int mvumi_suspend(struct pci_dev *pdev, pm_message_t state);
2648 int mvumi_resume(struct pci_dev *pdev);
2717 struct pci_driver mvumi_pci_driver = { { 0, 0 }, "mvumi", (const struct pci_device_id *)(&mvumi_pci_table), &mvumi_probe_one, &mvumi_detach_one, &mvumi_suspend, 0, 0, &mvumi_resume, &mvumi_shutdown, 0, 0, { 0, 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { { { { 0 } }, 0U, 0U, 0, { 0, { 0, 0 }, 0, 0, 0UL } } } }, { 0, 0 } } };
2733 int mvumi_init();
2741 void mvumi_exit();
2766 void ldv_check_final_state();
2769 void ldv_check_return_value(int);
2772 void ldv_check_return_value_probe(int);
2775 void ldv_initialize();
2778 void ldv_handler_precall();
2781 int nondet_int();
2784 int LDV_IN_INTERRUPT = 0;
2787 void ldv_main0_sequence_infinite_withcheck_stateful();
10 void ldv_error();
14 void * ldv_err_ptr(long error);
21 long int ldv_ptr_err(const void *ptr);
28 bool ldv_is_err_or_null(const void *ptr);
5 int LDV_DMA_MAP_CALLS = 0;
16 void ldv_dma_mapping_error();
return ;
}
-entry_point
{
2789 struct mvumi_hba *var_group1;
2790 struct mvumi_cmd *var_group2;
2791 void *var_mvumi_clear_intr_66_p0;
2792 unsigned int *var_mvumi_check_ob_list_9143_21_p1;
2793 unsigned int *var_mvumi_check_ob_list_9143_21_p2;
2794 unsigned int *var_mvumi_check_ob_list_9580_22_p1;
2795 unsigned int *var_mvumi_check_ob_list_9580_22_p2;
2796 struct scsi_device *var_group3;
2797 struct Scsi_Host *var_group4;
2798 struct scsi_cmnd *var_group5;
2799 struct pci_dev *var_group6;
2800 const struct pci_device_id *var_mvumi_probe_one_75_p1;
2801 int res_mvumi_probe_one_75;
2802 struct pm_message var_mvumi_suspend_78_p1;
2803 int var_mvumi_isr_handler_61_p0;
2804 void *var_mvumi_isr_handler_61_p1;
2805 int ldv_s_mvumi_pci_driver_pci_driver;
2806 int tmp;
2807 int tmp___0;
2808 int tmp___1;
3024 ldv_s_mvumi_pci_driver_pci_driver = 0;
2997 LDV_IN_INTERRUPT = 1;
3006 ldv_initialize() { /* Function call is skipped due to function is undefined */}
3015 ldv_handler_precall() { /* Function call is skipped due to function is undefined */}
3016 -mvumi_init()
{
2735 int tmp;
2735 tmp = __pci_register_driver(&mvumi_pci_driver, &__this_module, "mvumi") { /* Function call is skipped due to function is undefined */}
2735 return tmp;;
}
3016 assume(!(tmp != 0));
3030 goto ldv_40793;
3030 tmp___1 = nondet_int() { /* Function call is skipped due to function is undefined */}
3030 assume(tmp___1 != 0);
3033 goto ldv_40792;
3031 ldv_40792:;
3034 tmp___0 = nondet_int() { /* Function call is skipped due to function is undefined */}
3034 switch (tmp___0);
3035 assume(!(tmp___0 == 0));
3057 assume(!(tmp___0 == 1));
3078 assume(!(tmp___0 == 2));
3099 assume(!(tmp___0 == 3));
3120 assume(!(tmp___0 == 4));
3141 assume(!(tmp___0 == 5));
3162 assume(!(tmp___0 == 6));
3183 assume(!(tmp___0 == 7));
3204 assume(!(tmp___0 == 8));
3225 assume(!(tmp___0 == 9));
3246 assume(!(tmp___0 == 10));
3267 assume(!(tmp___0 == 11));
3288 assume(!(tmp___0 == 12));
3309 assume(!(tmp___0 == 13));
3330 assume(!(tmp___0 == 14));
3351 assume(!(tmp___0 == 15));
3372 assume(!(tmp___0 == 16));
3393 assume(tmp___0 == 17);
3401 ldv_handler_precall() { /* Function call is skipped due to function is undefined */}
3402 -mvumi_queue_command(var_group4, var_group5)
{
2122 struct mvumi_cmd *cmd;
2123 struct mvumi_hba *mhba;
2124 unsigned long irq_flags;
2125 raw_spinlock_t *tmp;
2126 long tmp___0;
2127 unsigned char tmp___1;
2128 long tmp___2;
2127 -spinlock_check(shost->host_lock)
{
288 return &(lock->__annonCompField20.rlock);;
}
2127 irq_flags = _raw_spin_lock_irqsave(tmp) { /* Function call is skipped due to function is undefined */}
2128 scsi_cmd_get_serial(shost, scmd) { /* Function call is skipped due to function is undefined */}
2130 mhba = (struct mvumi_hba *)(&(shost->hostdata));
2131 scmd->result = 0;
2132 -mvumi_get_cmd(mhba)
{
346 struct mvumi_cmd *cmd;
347 const struct list_head *__mptr;
348 int tmp;
349 long tmp___0;
346 cmd = (struct mvumi_cmd *)0;
348 -list_empty((const struct list_head *)(&(mhba->cmd_pool)))
{
202 union __anonunion___u_15 __u;
202 -__read_once_size((const volatile void *)(&(head->next)), (void *)(&(__u.__c)), 8)
{
254 switch (size);
255 assume(!(size == 1));
255 assume(!(size == 2));
255 assume(!(size == 4));
255 assume(size == 8);
254 *((__u64 *)res) = *((volatile __u64 *)p);
254 goto ldv_883;
256 return ;;
}
202 return ((unsigned long)((const struct list_head *)(__u.__val))) == ((unsigned long)head);;
}
348 tmp___0 = __builtin_expect(tmp == 0, 1L) { /* Function call is skipped due to function is undefined */}
348 assume(!(tmp___0 != 0L));
353 dev_warn((const struct device *)(&(mhba->pdev->dev)), "command pool is empty!\n") { /* Function call is skipped due to function is undefined */}
355 return cmd;;
}
2133 tmp___0 = __builtin_expect(((unsigned long)cmd) == ((unsigned long)((struct mvumi_cmd *)0)), 0L) { /* Function call is skipped due to function is undefined */}
2133 assume(!(tmp___0 != 0L));
2138 -mvumi_build_frame(mhba, scmd, cmd)
{
2066 struct mvumi_msg_frame *pframe;
2067 int tmp;
2068 unsigned int tmp___0;
2068 cmd->scmd = scmd;
2069 cmd->cmd_status = 128U;
2070 pframe = cmd->frame;
2071 short __CPAchecker_TMP_0 = (short)(scmd->device->id);
2071 unsigned short __CPAchecker_TMP_1 = (unsigned short)(scmd->device->lun);
2071 pframe->device_id = (u16 )(((int)__CPAchecker_TMP_0) | ((int)((short)(((int)__CPAchecker_TMP_1) << 8))));
2073 pframe->cmd_flag = 0U;
2075 unsigned int __CPAchecker_TMP_2 = (unsigned int)(scmd->sc_data_direction);
2075 switch (__CPAchecker_TMP_2);
2076 assume(!(__CPAchecker_TMP_2 == 3U));
2079 assume(!(__CPAchecker_TMP_2 == 2U));
2082 assume(__CPAchecker_TMP_2 == 1U);
2083 unsigned int __CPAchecker_TMP_5 = (unsigned int)(pframe->cmd_flag);
2083 pframe->cmd_flag = (u8 )(__CPAchecker_TMP_5 | 16U);
2084 goto ldv_40570;
2091 ldv_40570:;
2092 u8 __CPAchecker_TMP_7 = (u8 )(scmd->cmd_len);
2092 pframe->cdb_length = __CPAchecker_TMP_7;
2093 const void *__CPAchecker_TMP_8 = (const void *)(scmd->cmnd);
2093 size_t __CPAchecker_TMP_9 = (size_t )(pframe->cdb_length);
2093 __memcpy((void *)(&(pframe->cdb)), __CPAchecker_TMP_8, __CPAchecker_TMP_9) { /* Function call is skipped due to function is undefined */}
2094 pframe->req_function = 1U;
2095 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
2095 assume(tmp___0 != 0U);
2096 -mvumi_make_sgl(mhba, scmd, (void *)(&(pframe->payload)), &(pframe->sg_counts))
{
208 struct scatterlist *sg;
209 struct mvumi_sgl *m_sg;
210 unsigned int i;
211 unsigned int sgnum;
212 unsigned int tmp;
213 unsigned long long busaddr;
214 int tmp___0;
215 unsigned int tmp___2;
216 struct scatterlist *tmp___3;
217 unsigned long long tmp___4;
218 unsigned int tmp___5;
219 unsigned int tmp___6;
209 m_sg = (struct mvumi_sgl *)sgl_p;
211 -scsi_sg_count(scmd)
{
175 return cmd->sdb.table.nents;;
}
211 sgnum = tmp;
214 assume(!(sgnum != 0U));
236 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
236 assume(tmp___5 != 0U);
236 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
236 -scsi_sglist(scmd)
{
180 return cmd->sdb.table.sgl;;
}
236 int __CPAchecker_TMP_6 = (int)(scmd->sc_data_direction);
236 -pci_map_single(mhba->pdev, (void *)tmp___3, (size_t )tmp___2, __CPAchecker_TMP_6)
{
41 unsigned long long tmp;
40 struct device *__CPAchecker_TMP_0;
40 assume(((unsigned long)hwdev) != ((unsigned long)((struct pci_dev *)0)));
40 __CPAchecker_TMP_0 = &(hwdev->dev);
40 -dma_map_single_attrs(__CPAchecker_TMP_0, ptr, size, (enum dma_data_direction )direction, 0UL)
{
38 unsigned long long tmp;
38 -ldv_dma_map_page()
{
10 assume(!(LDV_DMA_MAP_CALLS != 0));
12 LDV_DMA_MAP_CALLS = LDV_DMA_MAP_CALLS + 1;
13 return ;;
}
40 -ldv_dma_map_single_attrs_5(dev, ptr, size, dir, attrs)
{
204 const struct dma_map_ops *ops;
205 const struct dma_map_ops *tmp;
206 unsigned long long addr;
207 int tmp___0;
208 long tmp___1;
209 unsigned long tmp___2;
210 unsigned long tmp___3;
205 -get_dma_ops(dev)
{
177 const struct dma_map_ops *tmp;
177 assume(((unsigned long)dev) != ((unsigned long)((struct device *)0)));
177 unsigned long __CPAchecker_TMP_0 = (unsigned long)(dev->dma_ops);
177 assume(!(__CPAchecker_TMP_0 != ((unsigned long)((const struct dma_map_ops *)0))));
179 struct bus_type *__CPAchecker_TMP_1;
179 assume(((unsigned long)dev) != ((unsigned long)((struct device *)0)));
179 __CPAchecker_TMP_1 = dev->bus;
179 -get_arch_dma_ops(__CPAchecker_TMP_1)
{
32 return dma_ops;;
}
179 return tmp;;
}
205 ops = tmp;
208 -kmemcheck_mark_initialized(ptr, (unsigned int)size)
{
133 return ;;
}
209 -valid_dma_direction((int)dir)
{
146 int __CPAchecker_TMP_0;
146 assume(!(dma_direction == 0));
146 assume(dma_direction == 1);
__CPAchecker_TMP_0 = 1;
146 return __CPAchecker_TMP_0;;
}
209 tmp___1 = __builtin_expect(tmp___0 == 0, 0L) { /* Function call is skipped due to function is undefined */}
209 assume(!(tmp___1 != 0L));
210 tmp___2 = __phys_addr((unsigned long)ptr) { /* Function call is skipped due to function is undefined */}
210 addr = (*(ops->map_page))(dev, (struct page *)((tmp___2 >> 12) + vmemmap_base), ((unsigned long)ptr) & 4095UL, size, dir, attrs);
213 tmp___3 = __phys_addr((unsigned long)ptr) { /* Function call is skipped due to function is undefined */}
213 debug_dma_map_page(dev, (struct page *)((tmp___3 >> 12) + vmemmap_base), ((unsigned long)ptr) & 4095UL, size, (int)dir, addr, 1) { /* Function call is skipped due to function is undefined */}
216 return addr;;
}
40 return tmp;;
}
40 return tmp;;
}
236 scmd->SCp.dma_handle = tmp___4;
241 busaddr = scmd->SCp.dma_handle;
242 m_sg->baseaddr_l = (unsigned int)busaddr;
243 m_sg->baseaddr_h = (unsigned int)(busaddr >> 32ULL);
244 int __CPAchecker_TMP_7 = (int)(mhba->eot_flag);
244 m_sg->flags = 1U << __CPAchecker_TMP_7;
245 unsigned int __CPAchecker_TMP_8 = (unsigned int)(mhba->hba_capability);
245 assume(!((__CPAchecker_TMP_8 & 16U) != 0U));
245 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
246 *sg_count = 1U;
249 return 0;;
}
2096 assume(!(tmp != 0));
2100 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
2105 return 0U;;
}
2138 tmp___2 = __builtin_expect(((unsigned int)tmp___1) != 0U, 0L) { /* Function call is skipped due to function is undefined */}
2138 assume(!(tmp___2 != 0L));
2141 cmd->scmd = scmd;
2142 scmd->SCp.ptr = (char *)cmd;
2143 assume(!((mhba->instancet->fire_cmd) == (&mvumi_fire_cmd)));
2143 (*(mhba->instancet->fire_cmd))(mhba, cmd);
2144 -spin_unlock_irqrestore(shost->host_lock, irq_flags)
{
354 _raw_spin_unlock_irqrestore(&(lock->__annonCompField20.rlock), flags) { /* Function call is skipped due to function is undefined */}
355 return ;;
}
2145 return 0;;
}
3413 goto ldv_40764;
3587 ldv_40764:;
3588 ldv_40793:;
3030 tmp___1 = nondet_int() { /* Function call is skipped due to function is undefined */}
3030 assume(tmp___1 != 0);
3033 goto ldv_40792;
3031 ldv_40792:;
3034 tmp___0 = nondet_int() { /* Function call is skipped due to function is undefined */}
3034 switch (tmp___0);
3035 assume(!(tmp___0 == 0));
3057 assume(!(tmp___0 == 1));
3078 assume(!(tmp___0 == 2));
3099 assume(!(tmp___0 == 3));
3120 assume(!(tmp___0 == 4));
3141 assume(!(tmp___0 == 5));
3162 assume(!(tmp___0 == 6));
3183 assume(!(tmp___0 == 7));
3204 assume(!(tmp___0 == 8));
3225 assume(!(tmp___0 == 9));
3246 assume(!(tmp___0 == 10));
3267 assume(!(tmp___0 == 11));
3288 assume(!(tmp___0 == 12));
3309 assume(!(tmp___0 == 13));
3330 assume(!(tmp___0 == 14));
3351 assume(!(tmp___0 == 15));
3372 assume(!(tmp___0 == 16));
3393 assume(tmp___0 == 17);
3401 ldv_handler_precall() { /* Function call is skipped due to function is undefined */}
3402 -mvumi_queue_command(var_group4, var_group5)
{
2122 struct mvumi_cmd *cmd;
2123 struct mvumi_hba *mhba;
2124 unsigned long irq_flags;
2125 raw_spinlock_t *tmp;
2126 long tmp___0;
2127 unsigned char tmp___1;
2128 long tmp___2;
2127 -spinlock_check(shost->host_lock)
{
288 return &(lock->__annonCompField20.rlock);;
}
2127 irq_flags = _raw_spin_lock_irqsave(tmp) { /* Function call is skipped due to function is undefined */}
2128 scsi_cmd_get_serial(shost, scmd) { /* Function call is skipped due to function is undefined */}
2130 mhba = (struct mvumi_hba *)(&(shost->hostdata));
2131 scmd->result = 0;
2132 -mvumi_get_cmd(mhba)
{
346 struct mvumi_cmd *cmd;
347 const struct list_head *__mptr;
348 int tmp;
349 long tmp___0;
346 cmd = (struct mvumi_cmd *)0;
348 -list_empty((const struct list_head *)(&(mhba->cmd_pool)))
{
202 union __anonunion___u_15 __u;
202 -__read_once_size((const volatile void *)(&(head->next)), (void *)(&(__u.__c)), 8)
{
254 switch (size);
255 assume(!(size == 1));
255 assume(!(size == 2));
255 assume(!(size == 4));
255 assume(size == 8);
254 *((__u64 *)res) = *((volatile __u64 *)p);
254 goto ldv_883;
256 return ;;
}
202 return ((unsigned long)((const struct list_head *)(__u.__val))) == ((unsigned long)head);;
}
348 tmp___0 = __builtin_expect(tmp == 0, 1L) { /* Function call is skipped due to function is undefined */}
348 assume(!(tmp___0 != 0L));
353 dev_warn((const struct device *)(&(mhba->pdev->dev)), "command pool is empty!\n") { /* Function call is skipped due to function is undefined */}
355 return cmd;;
}
2133 tmp___0 = __builtin_expect(((unsigned long)cmd) == ((unsigned long)((struct mvumi_cmd *)0)), 0L) { /* Function call is skipped due to function is undefined */}
2133 assume(!(tmp___0 != 0L));
2138 -mvumi_build_frame(mhba, scmd, cmd)
{
2066 struct mvumi_msg_frame *pframe;
2067 int tmp;
2068 unsigned int tmp___0;
2068 cmd->scmd = scmd;
2069 cmd->cmd_status = 128U;
2070 pframe = cmd->frame;
2071 short __CPAchecker_TMP_0 = (short)(scmd->device->id);
2071 unsigned short __CPAchecker_TMP_1 = (unsigned short)(scmd->device->lun);
2071 pframe->device_id = (u16 )(((int)__CPAchecker_TMP_0) | ((int)((short)(((int)__CPAchecker_TMP_1) << 8))));
2073 pframe->cmd_flag = 0U;
2075 unsigned int __CPAchecker_TMP_2 = (unsigned int)(scmd->sc_data_direction);
2075 switch (__CPAchecker_TMP_2);
2076 assume(!(__CPAchecker_TMP_2 == 3U));
2079 assume(!(__CPAchecker_TMP_2 == 2U));
2082 assume(__CPAchecker_TMP_2 == 1U);
2083 unsigned int __CPAchecker_TMP_5 = (unsigned int)(pframe->cmd_flag);
2083 pframe->cmd_flag = (u8 )(__CPAchecker_TMP_5 | 16U);
2084 goto ldv_40570;
2091 ldv_40570:;
2092 u8 __CPAchecker_TMP_7 = (u8 )(scmd->cmd_len);
2092 pframe->cdb_length = __CPAchecker_TMP_7;
2093 const void *__CPAchecker_TMP_8 = (const void *)(scmd->cmnd);
2093 size_t __CPAchecker_TMP_9 = (size_t )(pframe->cdb_length);
2093 __memcpy((void *)(&(pframe->cdb)), __CPAchecker_TMP_8, __CPAchecker_TMP_9) { /* Function call is skipped due to function is undefined */}
2094 pframe->req_function = 1U;
2095 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
2095 assume(tmp___0 != 0U);
2096 -mvumi_make_sgl(mhba, scmd, (void *)(&(pframe->payload)), &(pframe->sg_counts))
{
208 struct scatterlist *sg;
209 struct mvumi_sgl *m_sg;
210 unsigned int i;
211 unsigned int sgnum;
212 unsigned int tmp;
213 unsigned long long busaddr;
214 int tmp___0;
215 unsigned int tmp___2;
216 struct scatterlist *tmp___3;
217 unsigned long long tmp___4;
218 unsigned int tmp___5;
219 unsigned int tmp___6;
209 m_sg = (struct mvumi_sgl *)sgl_p;
211 -scsi_sg_count(scmd)
{
175 return cmd->sdb.table.nents;;
}
211 sgnum = tmp;
214 assume(!(sgnum != 0U));
236 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
236 assume(tmp___5 != 0U);
236 -scsi_bufflen(scmd)
{
185 return cmd->sdb.length;;
}
236 -scsi_sglist(scmd)
{
180 return cmd->sdb.table.sgl;;
}
236 int __CPAchecker_TMP_6 = (int)(scmd->sc_data_direction);
236 -pci_map_single(mhba->pdev, (void *)tmp___3, (size_t )tmp___2, __CPAchecker_TMP_6)
{
41 unsigned long long tmp;
40 struct device *__CPAchecker_TMP_0;
40 assume(((unsigned long)hwdev) != ((unsigned long)((struct pci_dev *)0)));
40 __CPAchecker_TMP_0 = &(hwdev->dev);
40 -dma_map_single_attrs(__CPAchecker_TMP_0, ptr, size, (enum dma_data_direction )direction, 0UL)
{
38 unsigned long long tmp;
38 -ldv_dma_map_page()
{
10 assume(LDV_DMA_MAP_CALLS != 0);
10 -ldv_error()
{
15 LDV_ERROR:;
}
}
}
}
}
}
}
}
Source code
1 #ifndef _ASM_X86_DMA_MAPPING_H 2 #define _ASM_X86_DMA_MAPPING_H 3 4 /* 5 * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and 6 * Documentation/DMA-API.txt for documentation. 7 */ 8 9 #include <linux/kmemcheck.h> 10 #include <linux/scatterlist.h> 11 #include <linux/dma-debug.h> 12 #include <asm/io.h> 13 #include <asm/swiotlb.h> 14 #include <linux/dma-contiguous.h> 15 16 #ifdef CONFIG_ISA 17 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(24) 18 #else 19 # define ISA_DMA_BIT_MASK DMA_BIT_MASK(32) 20 #endif 21 22 #define DMA_ERROR_CODE 0 23 24 extern int iommu_merge; 25 extern struct device x86_dma_fallback_dev; 26 extern int panic_on_overflow; 27 28 extern const struct dma_map_ops *dma_ops; 29 30 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 31 { 32 return dma_ops; 33 } 34 35 bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp); 36 #define arch_dma_alloc_attrs arch_dma_alloc_attrs 37 38 #define HAVE_ARCH_DMA_SUPPORTED 1 39 extern int dma_supported(struct device *hwdev, u64 mask); 40 41 extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, 42 dma_addr_t *dma_addr, gfp_t flag, 43 unsigned long attrs); 44 45 extern void dma_generic_free_coherent(struct device *dev, size_t size, 46 void *vaddr, dma_addr_t dma_addr, 47 unsigned long attrs); 48 49 #ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */ 50 extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size); 51 extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); 52 extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr); 53 #else 54 55 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) 56 { 57 if (!dev->dma_mask) 58 return 0; 59 60 return addr + size - 1 <= *dev->dma_mask; 61 } 62 63 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) 64 { 65 return paddr; 66 } 67 68 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) 69 { 70 return daddr; 71 } 72 #endif /* CONFIG_X86_DMA_REMAP */ 73 74 static inline void 75 dma_cache_sync(struct device *dev, void *vaddr, size_t size, 76 enum dma_data_direction dir) 77 { 78 flush_write_buffers(); 79 } 80 81 static inline unsigned long dma_alloc_coherent_mask(struct device *dev, 82 gfp_t gfp) 83 { 84 unsigned long dma_mask = 0; 85 86 dma_mask = dev->coherent_dma_mask; 87 if (!dma_mask) 88 dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32); 89 90 return dma_mask; 91 } 92 93 static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp) 94 { 95 unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp); 96 97 if (dma_mask <= DMA_BIT_MASK(24)) 98 gfp |= GFP_DMA; 99 #ifdef CONFIG_X86_64 100 if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA)) 101 gfp |= GFP_DMA32; 102 #endif 103 return gfp; 104 } 105 106 #endif
1 2 /* 3 * Marvell UMI driver 4 * 5 * Copyright 2011 Marvell. <jyli@marvell.com> 6 * 7 * This file is licensed under GPLv2. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; version 2 of the 12 * License. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 22 * USA 23 */ 24 25 #include <linux/kernel.h> 26 #include <linux/module.h> 27 #include <linux/moduleparam.h> 28 #include <linux/init.h> 29 #include <linux/device.h> 30 #include <linux/pci.h> 31 #include <linux/list.h> 32 #include <linux/spinlock.h> 33 #include <linux/interrupt.h> 34 #include <linux/delay.h> 35 #include <linux/ktime.h> 36 #include <linux/blkdev.h> 37 #include <linux/io.h> 38 #include <scsi/scsi.h> 39 #include <scsi/scsi_cmnd.h> 40 #include <scsi/scsi_device.h> 41 #include <scsi/scsi_host.h> 42 #include <scsi/scsi_transport.h> 43 #include <scsi/scsi_eh.h> 44 #include <linux/uaccess.h> 45 #include <linux/kthread.h> 46 47 #include "mvumi.h" 48 49 MODULE_LICENSE("GPL"); 50 MODULE_AUTHOR("jyli@marvell.com"); 51 MODULE_DESCRIPTION("Marvell UMI Driver"); 52 53 static const struct pci_device_id mvumi_pci_table[] = { 54 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, PCI_DEVICE_ID_MARVELL_MV9143) }, 55 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, PCI_DEVICE_ID_MARVELL_MV9580) }, 56 { 0 } 57 }; 58 59 MODULE_DEVICE_TABLE(pci, mvumi_pci_table); 60 61 static void tag_init(struct mvumi_tag *st, unsigned short size) 62 { 63 unsigned short i; 64 BUG_ON(size != st->size); 65 st->top = size; 66 for (i = 0; i < size; i++) 67 st->stack[i] = size - 1 - i; 68 } 69 70 static unsigned short tag_get_one(struct mvumi_hba *mhba, struct mvumi_tag *st) 71 { 72 BUG_ON(st->top <= 0); 73 return st->stack[--st->top]; 74 } 75 76 static void tag_release_one(struct mvumi_hba *mhba, struct mvumi_tag *st, 77 unsigned short tag) 78 { 79 BUG_ON(st->top >= st->size); 80 st->stack[st->top++] = tag; 81 } 82 83 static bool tag_is_empty(struct mvumi_tag *st) 84 { 85 if (st->top == 0) 86 return 1; 87 else 88 return 0; 89 } 90 91 static void mvumi_unmap_pci_addr(struct pci_dev *dev, void **addr_array) 92 { 93 int i; 94 95 for (i = 0; i < MAX_BASE_ADDRESS; i++) 96 if ((pci_resource_flags(dev, i) & IORESOURCE_MEM) && 97 addr_array[i]) 98 pci_iounmap(dev, addr_array[i]); 99 } 100 101 static int mvumi_map_pci_addr(struct pci_dev *dev, void **addr_array) 102 { 103 int i; 104 105 for (i = 0; i < MAX_BASE_ADDRESS; i++) { 106 if (pci_resource_flags(dev, i) & IORESOURCE_MEM) { 107 addr_array[i] = pci_iomap(dev, i, 0); 108 if (!addr_array[i]) { 109 dev_err(&dev->dev, "failed to map Bar[%d]\n", 110 i); 111 mvumi_unmap_pci_addr(dev, addr_array); 112 return -ENOMEM; 113 } 114 } else 115 addr_array[i] = NULL; 116 117 dev_dbg(&dev->dev, "Bar %d : %p.\n", i, addr_array[i]); 118 } 119 120 return 0; 121 } 122 123 static struct mvumi_res *mvumi_alloc_mem_resource(struct mvumi_hba *mhba, 124 enum resource_type type, unsigned int size) 125 { 126 struct mvumi_res *res = kzalloc(sizeof(*res), GFP_ATOMIC); 127 128 if (!res) { 129 dev_err(&mhba->pdev->dev, 130 "Failed to allocate memory for resource manager.\n"); 131 return NULL; 132 } 133 134 switch (type) { 135 case RESOURCE_CACHED_MEMORY: 136 res->virt_addr = kzalloc(size, GFP_ATOMIC); 137 if (!res->virt_addr) { 138 dev_err(&mhba->pdev->dev, 139 "unable to allocate memory,size = %d.\n", size); 140 kfree(res); 141 return NULL; 142 } 143 break; 144 145 case RESOURCE_UNCACHED_MEMORY: 146 size = round_up(size, 8); 147 res->virt_addr = pci_zalloc_consistent(mhba->pdev, size, 148 &res->bus_addr); 149 if (!res->virt_addr) { 150 dev_err(&mhba->pdev->dev, 151 "unable to allocate consistent mem," 152 "size = %d.\n", size); 153 kfree(res); 154 return NULL; 155 } 156 break; 157 158 default: 159 dev_err(&mhba->pdev->dev, "unknown resource type %d.\n", type); 160 kfree(res); 161 return NULL; 162 } 163 164 res->type = type; 165 res->size = size; 166 INIT_LIST_HEAD(&res->entry); 167 list_add_tail(&res->entry, &mhba->res_list); 168 169 return res; 170 } 171 172 static void mvumi_release_mem_resource(struct mvumi_hba *mhba) 173 { 174 struct mvumi_res *res, *tmp; 175 176 list_for_each_entry_safe(res, tmp, &mhba->res_list, entry) { 177 switch (res->type) { 178 case RESOURCE_UNCACHED_MEMORY: 179 pci_free_consistent(mhba->pdev, res->size, 180 res->virt_addr, res->bus_addr); 181 break; 182 case RESOURCE_CACHED_MEMORY: 183 kfree(res->virt_addr); 184 break; 185 default: 186 dev_err(&mhba->pdev->dev, 187 "unknown resource type %d\n", res->type); 188 break; 189 } 190 list_del(&res->entry); 191 kfree(res); 192 } 193 mhba->fw_flag &= ~MVUMI_FW_ALLOC; 194 } 195 196 /** 197 * mvumi_make_sgl - Prepares SGL 198 * @mhba: Adapter soft state 199 * @scmd: SCSI command from the mid-layer 200 * @sgl_p: SGL to be filled in 201 * @sg_count return the number of SG elements 202 * 203 * If successful, this function returns 0. otherwise, it returns -1. 204 */ 205 static int mvumi_make_sgl(struct mvumi_hba *mhba, struct scsi_cmnd *scmd, 206 void *sgl_p, unsigned char *sg_count) 207 { 208 struct scatterlist *sg; 209 struct mvumi_sgl *m_sg = (struct mvumi_sgl *) sgl_p; 210 unsigned int i; 211 unsigned int sgnum = scsi_sg_count(scmd); 212 dma_addr_t busaddr; 213 214 if (sgnum) { 215 sg = scsi_sglist(scmd); 216 *sg_count = pci_map_sg(mhba->pdev, sg, sgnum, 217 (int) scmd->sc_data_direction); 218 if (*sg_count > mhba->max_sge) { 219 dev_err(&mhba->pdev->dev, "sg count[0x%x] is bigger " 220 "than max sg[0x%x].\n", 221 *sg_count, mhba->max_sge); 222 return -1; 223 } 224 for (i = 0; i < *sg_count; i++) { 225 busaddr = sg_dma_address(&sg[i]); 226 m_sg->baseaddr_l = cpu_to_le32(lower_32_bits(busaddr)); 227 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(busaddr)); 228 m_sg->flags = 0; 229 sgd_setsz(mhba, m_sg, cpu_to_le32(sg_dma_len(&sg[i]))); 230 if ((i + 1) == *sg_count) 231 m_sg->flags |= 1U << mhba->eot_flag; 232 233 sgd_inc(mhba, m_sg); 234 } 235 } else { 236 scmd->SCp.dma_handle = scsi_bufflen(scmd) ? 237 pci_map_single(mhba->pdev, scsi_sglist(scmd), 238 scsi_bufflen(scmd), 239 (int) scmd->sc_data_direction) 240 : 0; 241 busaddr = scmd->SCp.dma_handle; 242 m_sg->baseaddr_l = cpu_to_le32(lower_32_bits(busaddr)); 243 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(busaddr)); 244 m_sg->flags = 1U << mhba->eot_flag; 245 sgd_setsz(mhba, m_sg, cpu_to_le32(scsi_bufflen(scmd))); 246 *sg_count = 1; 247 } 248 249 return 0; 250 } 251 252 static int mvumi_internal_cmd_sgl(struct mvumi_hba *mhba, struct mvumi_cmd *cmd, 253 unsigned int size) 254 { 255 struct mvumi_sgl *m_sg; 256 void *virt_addr; 257 dma_addr_t phy_addr; 258 259 if (size == 0) 260 return 0; 261 262 virt_addr = pci_zalloc_consistent(mhba->pdev, size, &phy_addr); 263 if (!virt_addr) 264 return -1; 265 266 m_sg = (struct mvumi_sgl *) &cmd->frame->payload[0]; 267 cmd->frame->sg_counts = 1; 268 cmd->data_buf = virt_addr; 269 270 m_sg->baseaddr_l = cpu_to_le32(lower_32_bits(phy_addr)); 271 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(phy_addr)); 272 m_sg->flags = 1U << mhba->eot_flag; 273 sgd_setsz(mhba, m_sg, cpu_to_le32(size)); 274 275 return 0; 276 } 277 278 static struct mvumi_cmd *mvumi_create_internal_cmd(struct mvumi_hba *mhba, 279 unsigned int buf_size) 280 { 281 struct mvumi_cmd *cmd; 282 283 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 284 if (!cmd) { 285 dev_err(&mhba->pdev->dev, "failed to create a internal cmd\n"); 286 return NULL; 287 } 288 INIT_LIST_HEAD(&cmd->queue_pointer); 289 290 cmd->frame = pci_alloc_consistent(mhba->pdev, 291 mhba->ib_max_size, &cmd->frame_phys); 292 if (!cmd->frame) { 293 dev_err(&mhba->pdev->dev, "failed to allocate memory for FW" 294 " frame,size = %d.\n", mhba->ib_max_size); 295 kfree(cmd); 296 return NULL; 297 } 298 299 if (buf_size) { 300 if (mvumi_internal_cmd_sgl(mhba, cmd, buf_size)) { 301 dev_err(&mhba->pdev->dev, "failed to allocate memory" 302 " for internal frame\n"); 303 pci_free_consistent(mhba->pdev, mhba->ib_max_size, 304 cmd->frame, cmd->frame_phys); 305 kfree(cmd); 306 return NULL; 307 } 308 } else 309 cmd->frame->sg_counts = 0; 310 311 return cmd; 312 } 313 314 static void mvumi_delete_internal_cmd(struct mvumi_hba *mhba, 315 struct mvumi_cmd *cmd) 316 { 317 struct mvumi_sgl *m_sg; 318 unsigned int size; 319 dma_addr_t phy_addr; 320 321 if (cmd && cmd->frame) { 322 if (cmd->frame->sg_counts) { 323 m_sg = (struct mvumi_sgl *) &cmd->frame->payload[0]; 324 sgd_getsz(mhba, m_sg, size); 325 326 phy_addr = (dma_addr_t) m_sg->baseaddr_l | 327 (dma_addr_t) ((m_sg->baseaddr_h << 16) << 16); 328 329 pci_free_consistent(mhba->pdev, size, cmd->data_buf, 330 phy_addr); 331 } 332 pci_free_consistent(mhba->pdev, mhba->ib_max_size, 333 cmd->frame, cmd->frame_phys); 334 kfree(cmd); 335 } 336 } 337 338 /** 339 * mvumi_get_cmd - Get a command from the free pool 340 * @mhba: Adapter soft state 341 * 342 * Returns a free command from the pool 343 */ 344 static struct mvumi_cmd *mvumi_get_cmd(struct mvumi_hba *mhba) 345 { 346 struct mvumi_cmd *cmd = NULL; 347 348 if (likely(!list_empty(&mhba->cmd_pool))) { 349 cmd = list_entry((&mhba->cmd_pool)->next, 350 struct mvumi_cmd, queue_pointer); 351 list_del_init(&cmd->queue_pointer); 352 } else 353 dev_warn(&mhba->pdev->dev, "command pool is empty!\n"); 354 355 return cmd; 356 } 357 358 /** 359 * mvumi_return_cmd - Return a cmd to free command pool 360 * @mhba: Adapter soft state 361 * @cmd: Command packet to be returned to free command pool 362 */ 363 static inline void mvumi_return_cmd(struct mvumi_hba *mhba, 364 struct mvumi_cmd *cmd) 365 { 366 cmd->scmd = NULL; 367 list_add_tail(&cmd->queue_pointer, &mhba->cmd_pool); 368 } 369 370 /** 371 * mvumi_free_cmds - Free all the cmds in the free cmd pool 372 * @mhba: Adapter soft state 373 */ 374 static void mvumi_free_cmds(struct mvumi_hba *mhba) 375 { 376 struct mvumi_cmd *cmd; 377 378 while (!list_empty(&mhba->cmd_pool)) { 379 cmd = list_first_entry(&mhba->cmd_pool, struct mvumi_cmd, 380 queue_pointer); 381 list_del(&cmd->queue_pointer); 382 if (!(mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC)) 383 kfree(cmd->frame); 384 kfree(cmd); 385 } 386 } 387 388 /** 389 * mvumi_alloc_cmds - Allocates the command packets 390 * @mhba: Adapter soft state 391 * 392 */ 393 static int mvumi_alloc_cmds(struct mvumi_hba *mhba) 394 { 395 int i; 396 struct mvumi_cmd *cmd; 397 398 for (i = 0; i < mhba->max_io; i++) { 399 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 400 if (!cmd) 401 goto err_exit; 402 403 INIT_LIST_HEAD(&cmd->queue_pointer); 404 list_add_tail(&cmd->queue_pointer, &mhba->cmd_pool); 405 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 406 cmd->frame = mhba->ib_frame + i * mhba->ib_max_size; 407 cmd->frame_phys = mhba->ib_frame_phys 408 + i * mhba->ib_max_size; 409 } else 410 cmd->frame = kzalloc(mhba->ib_max_size, GFP_KERNEL); 411 if (!cmd->frame) 412 goto err_exit; 413 } 414 return 0; 415 416 err_exit: 417 dev_err(&mhba->pdev->dev, 418 "failed to allocate memory for cmd[0x%x].\n", i); 419 while (!list_empty(&mhba->cmd_pool)) { 420 cmd = list_first_entry(&mhba->cmd_pool, struct mvumi_cmd, 421 queue_pointer); 422 list_del(&cmd->queue_pointer); 423 if (!(mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC)) 424 kfree(cmd->frame); 425 kfree(cmd); 426 } 427 return -ENOMEM; 428 } 429 430 static unsigned int mvumi_check_ib_list_9143(struct mvumi_hba *mhba) 431 { 432 unsigned int ib_rp_reg; 433 struct mvumi_hw_regs *regs = mhba->regs; 434 435 ib_rp_reg = ioread32(mhba->regs->inb_read_pointer); 436 437 if (unlikely(((ib_rp_reg & regs->cl_slot_num_mask) == 438 (mhba->ib_cur_slot & regs->cl_slot_num_mask)) && 439 ((ib_rp_reg & regs->cl_pointer_toggle) 440 != (mhba->ib_cur_slot & regs->cl_pointer_toggle)))) { 441 dev_warn(&mhba->pdev->dev, "no free slot to use.\n"); 442 return 0; 443 } 444 if (atomic_read(&mhba->fw_outstanding) >= mhba->max_io) { 445 dev_warn(&mhba->pdev->dev, "firmware io overflow.\n"); 446 return 0; 447 } else { 448 return mhba->max_io - atomic_read(&mhba->fw_outstanding); 449 } 450 } 451 452 static unsigned int mvumi_check_ib_list_9580(struct mvumi_hba *mhba) 453 { 454 unsigned int count; 455 if (atomic_read(&mhba->fw_outstanding) >= (mhba->max_io - 1)) 456 return 0; 457 count = ioread32(mhba->ib_shadow); 458 if (count == 0xffff) 459 return 0; 460 return count; 461 } 462 463 static void mvumi_get_ib_list_entry(struct mvumi_hba *mhba, void **ib_entry) 464 { 465 unsigned int cur_ib_entry; 466 467 cur_ib_entry = mhba->ib_cur_slot & mhba->regs->cl_slot_num_mask; 468 cur_ib_entry++; 469 if (cur_ib_entry >= mhba->list_num_io) { 470 cur_ib_entry -= mhba->list_num_io; 471 mhba->ib_cur_slot ^= mhba->regs->cl_pointer_toggle; 472 } 473 mhba->ib_cur_slot &= ~mhba->regs->cl_slot_num_mask; 474 mhba->ib_cur_slot |= (cur_ib_entry & mhba->regs->cl_slot_num_mask); 475 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 476 *ib_entry = mhba->ib_list + cur_ib_entry * 477 sizeof(struct mvumi_dyn_list_entry); 478 } else { 479 *ib_entry = mhba->ib_list + cur_ib_entry * mhba->ib_max_size; 480 } 481 atomic_inc(&mhba->fw_outstanding); 482 } 483 484 static void mvumi_send_ib_list_entry(struct mvumi_hba *mhba) 485 { 486 iowrite32(0xffff, mhba->ib_shadow); 487 iowrite32(mhba->ib_cur_slot, mhba->regs->inb_write_pointer); 488 } 489 490 static char mvumi_check_ob_frame(struct mvumi_hba *mhba, 491 unsigned int cur_obf, struct mvumi_rsp_frame *p_outb_frame) 492 { 493 unsigned short tag, request_id; 494 495 udelay(1); 496 p_outb_frame = mhba->ob_list + cur_obf * mhba->ob_max_size; 497 request_id = p_outb_frame->request_id; 498 tag = p_outb_frame->tag; 499 if (tag > mhba->tag_pool.size) { 500 dev_err(&mhba->pdev->dev, "ob frame data error\n"); 501 return -1; 502 } 503 if (mhba->tag_cmd[tag] == NULL) { 504 dev_err(&mhba->pdev->dev, "tag[0x%x] with NO command\n", tag); 505 return -1; 506 } else if (mhba->tag_cmd[tag]->request_id != request_id && 507 mhba->request_id_enabled) { 508 dev_err(&mhba->pdev->dev, "request ID from FW:0x%x," 509 "cmd request ID:0x%x\n", request_id, 510 mhba->tag_cmd[tag]->request_id); 511 return -1; 512 } 513 514 return 0; 515 } 516 517 static int mvumi_check_ob_list_9143(struct mvumi_hba *mhba, 518 unsigned int *cur_obf, unsigned int *assign_obf_end) 519 { 520 unsigned int ob_write, ob_write_shadow; 521 struct mvumi_hw_regs *regs = mhba->regs; 522 523 do { 524 ob_write = ioread32(regs->outb_copy_pointer); 525 ob_write_shadow = ioread32(mhba->ob_shadow); 526 } while ((ob_write & regs->cl_slot_num_mask) != ob_write_shadow); 527 528 *cur_obf = mhba->ob_cur_slot & mhba->regs->cl_slot_num_mask; 529 *assign_obf_end = ob_write & mhba->regs->cl_slot_num_mask; 530 531 if ((ob_write & regs->cl_pointer_toggle) != 532 (mhba->ob_cur_slot & regs->cl_pointer_toggle)) { 533 *assign_obf_end += mhba->list_num_io; 534 } 535 return 0; 536 } 537 538 static int mvumi_check_ob_list_9580(struct mvumi_hba *mhba, 539 unsigned int *cur_obf, unsigned int *assign_obf_end) 540 { 541 unsigned int ob_write; 542 struct mvumi_hw_regs *regs = mhba->regs; 543 544 ob_write = ioread32(regs->outb_read_pointer); 545 ob_write = ioread32(regs->outb_copy_pointer); 546 *cur_obf = mhba->ob_cur_slot & mhba->regs->cl_slot_num_mask; 547 *assign_obf_end = ob_write & mhba->regs->cl_slot_num_mask; 548 if (*assign_obf_end < *cur_obf) 549 *assign_obf_end += mhba->list_num_io; 550 else if (*assign_obf_end == *cur_obf) 551 return -1; 552 return 0; 553 } 554 555 static void mvumi_receive_ob_list_entry(struct mvumi_hba *mhba) 556 { 557 unsigned int cur_obf, assign_obf_end, i; 558 struct mvumi_ob_data *ob_data; 559 struct mvumi_rsp_frame *p_outb_frame; 560 struct mvumi_hw_regs *regs = mhba->regs; 561 562 if (mhba->instancet->check_ob_list(mhba, &cur_obf, &assign_obf_end)) 563 return; 564 565 for (i = (assign_obf_end - cur_obf); i != 0; i--) { 566 cur_obf++; 567 if (cur_obf >= mhba->list_num_io) { 568 cur_obf -= mhba->list_num_io; 569 mhba->ob_cur_slot ^= regs->cl_pointer_toggle; 570 } 571 572 p_outb_frame = mhba->ob_list + cur_obf * mhba->ob_max_size; 573 574 /* Copy pointer may point to entry in outbound list 575 * before entry has valid data 576 */ 577 if (unlikely(p_outb_frame->tag > mhba->tag_pool.size || 578 mhba->tag_cmd[p_outb_frame->tag] == NULL || 579 p_outb_frame->request_id != 580 mhba->tag_cmd[p_outb_frame->tag]->request_id)) 581 if (mvumi_check_ob_frame(mhba, cur_obf, p_outb_frame)) 582 continue; 583 584 if (!list_empty(&mhba->ob_data_list)) { 585 ob_data = (struct mvumi_ob_data *) 586 list_first_entry(&mhba->ob_data_list, 587 struct mvumi_ob_data, list); 588 list_del_init(&ob_data->list); 589 } else { 590 ob_data = NULL; 591 if (cur_obf == 0) { 592 cur_obf = mhba->list_num_io - 1; 593 mhba->ob_cur_slot ^= regs->cl_pointer_toggle; 594 } else 595 cur_obf -= 1; 596 break; 597 } 598 599 memcpy(ob_data->data, p_outb_frame, mhba->ob_max_size); 600 p_outb_frame->tag = 0xff; 601 602 list_add_tail(&ob_data->list, &mhba->free_ob_list); 603 } 604 mhba->ob_cur_slot &= ~regs->cl_slot_num_mask; 605 mhba->ob_cur_slot |= (cur_obf & regs->cl_slot_num_mask); 606 iowrite32(mhba->ob_cur_slot, regs->outb_read_pointer); 607 } 608 609 static void mvumi_reset(struct mvumi_hba *mhba) 610 { 611 struct mvumi_hw_regs *regs = mhba->regs; 612 613 iowrite32(0, regs->enpointa_mask_reg); 614 if (ioread32(regs->arm_to_pciea_msg1) != HANDSHAKE_DONESTATE) 615 return; 616 617 iowrite32(DRBL_SOFT_RESET, regs->pciea_to_arm_drbl_reg); 618 } 619 620 static unsigned char mvumi_start(struct mvumi_hba *mhba); 621 622 static int mvumi_wait_for_outstanding(struct mvumi_hba *mhba) 623 { 624 mhba->fw_state = FW_STATE_ABORT; 625 mvumi_reset(mhba); 626 627 if (mvumi_start(mhba)) 628 return FAILED; 629 else 630 return SUCCESS; 631 } 632 633 static int mvumi_wait_for_fw(struct mvumi_hba *mhba) 634 { 635 struct mvumi_hw_regs *regs = mhba->regs; 636 u32 tmp; 637 unsigned long before; 638 before = jiffies; 639 640 iowrite32(0, regs->enpointa_mask_reg); 641 tmp = ioread32(regs->arm_to_pciea_msg1); 642 while (tmp != HANDSHAKE_READYSTATE) { 643 iowrite32(DRBL_MU_RESET, regs->pciea_to_arm_drbl_reg); 644 if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) { 645 dev_err(&mhba->pdev->dev, 646 "FW reset failed [0x%x].\n", tmp); 647 return FAILED; 648 } 649 650 msleep(500); 651 rmb(); 652 tmp = ioread32(regs->arm_to_pciea_msg1); 653 } 654 655 return SUCCESS; 656 } 657 658 static void mvumi_backup_bar_addr(struct mvumi_hba *mhba) 659 { 660 unsigned char i; 661 662 for (i = 0; i < MAX_BASE_ADDRESS; i++) { 663 pci_read_config_dword(mhba->pdev, 0x10 + i * 4, 664 &mhba->pci_base[i]); 665 } 666 } 667 668 static void mvumi_restore_bar_addr(struct mvumi_hba *mhba) 669 { 670 unsigned char i; 671 672 for (i = 0; i < MAX_BASE_ADDRESS; i++) { 673 if (mhba->pci_base[i]) 674 pci_write_config_dword(mhba->pdev, 0x10 + i * 4, 675 mhba->pci_base[i]); 676 } 677 } 678 679 static unsigned int mvumi_pci_set_master(struct pci_dev *pdev) 680 { 681 unsigned int ret = 0; 682 pci_set_master(pdev); 683 684 if (IS_DMA64) { 685 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) 686 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 687 } else 688 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 689 690 return ret; 691 } 692 693 static int mvumi_reset_host_9580(struct mvumi_hba *mhba) 694 { 695 mhba->fw_state = FW_STATE_ABORT; 696 697 iowrite32(0, mhba->regs->reset_enable); 698 iowrite32(0xf, mhba->regs->reset_request); 699 700 iowrite32(0x10, mhba->regs->reset_enable); 701 iowrite32(0x10, mhba->regs->reset_request); 702 msleep(100); 703 pci_disable_device(mhba->pdev); 704 705 if (pci_enable_device(mhba->pdev)) { 706 dev_err(&mhba->pdev->dev, "enable device failed\n"); 707 return FAILED; 708 } 709 if (mvumi_pci_set_master(mhba->pdev)) { 710 dev_err(&mhba->pdev->dev, "set master failed\n"); 711 return FAILED; 712 } 713 mvumi_restore_bar_addr(mhba); 714 if (mvumi_wait_for_fw(mhba) == FAILED) 715 return FAILED; 716 717 return mvumi_wait_for_outstanding(mhba); 718 } 719 720 static int mvumi_reset_host_9143(struct mvumi_hba *mhba) 721 { 722 return mvumi_wait_for_outstanding(mhba); 723 } 724 725 static int mvumi_host_reset(struct scsi_cmnd *scmd) 726 { 727 struct mvumi_hba *mhba; 728 729 mhba = (struct mvumi_hba *) scmd->device->host->hostdata; 730 731 scmd_printk(KERN_NOTICE, scmd, "RESET -%ld cmd=%x retries=%x\n", 732 scmd->serial_number, scmd->cmnd[0], scmd->retries); 733 734 return mhba->instancet->reset_host(mhba); 735 } 736 737 static int mvumi_issue_blocked_cmd(struct mvumi_hba *mhba, 738 struct mvumi_cmd *cmd) 739 { 740 unsigned long flags; 741 742 cmd->cmd_status = REQ_STATUS_PENDING; 743 744 if (atomic_read(&cmd->sync_cmd)) { 745 dev_err(&mhba->pdev->dev, 746 "last blocked cmd not finished, sync_cmd = %d\n", 747 atomic_read(&cmd->sync_cmd)); 748 BUG_ON(1); 749 return -1; 750 } 751 atomic_inc(&cmd->sync_cmd); 752 spin_lock_irqsave(mhba->shost->host_lock, flags); 753 mhba->instancet->fire_cmd(mhba, cmd); 754 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 755 756 wait_event_timeout(mhba->int_cmd_wait_q, 757 (cmd->cmd_status != REQ_STATUS_PENDING), 758 MVUMI_INTERNAL_CMD_WAIT_TIME * HZ); 759 760 /* command timeout */ 761 if (atomic_read(&cmd->sync_cmd)) { 762 spin_lock_irqsave(mhba->shost->host_lock, flags); 763 atomic_dec(&cmd->sync_cmd); 764 if (mhba->tag_cmd[cmd->frame->tag]) { 765 mhba->tag_cmd[cmd->frame->tag] = 0; 766 dev_warn(&mhba->pdev->dev, "TIMEOUT:release tag [%d]\n", 767 cmd->frame->tag); 768 tag_release_one(mhba, &mhba->tag_pool, cmd->frame->tag); 769 } 770 if (!list_empty(&cmd->queue_pointer)) { 771 dev_warn(&mhba->pdev->dev, 772 "TIMEOUT:A internal command doesn't send!\n"); 773 list_del_init(&cmd->queue_pointer); 774 } else 775 atomic_dec(&mhba->fw_outstanding); 776 777 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 778 } 779 return 0; 780 } 781 782 static void mvumi_release_fw(struct mvumi_hba *mhba) 783 { 784 mvumi_free_cmds(mhba); 785 mvumi_release_mem_resource(mhba); 786 mvumi_unmap_pci_addr(mhba->pdev, mhba->base_addr); 787 pci_free_consistent(mhba->pdev, HSP_MAX_SIZE, 788 mhba->handshake_page, mhba->handshake_page_phys); 789 kfree(mhba->regs); 790 pci_release_regions(mhba->pdev); 791 } 792 793 static unsigned char mvumi_flush_cache(struct mvumi_hba *mhba) 794 { 795 struct mvumi_cmd *cmd; 796 struct mvumi_msg_frame *frame; 797 unsigned char device_id, retry = 0; 798 unsigned char bitcount = sizeof(unsigned char) * 8; 799 800 for (device_id = 0; device_id < mhba->max_target_id; device_id++) { 801 if (!(mhba->target_map[device_id / bitcount] & 802 (1 << (device_id % bitcount)))) 803 continue; 804 get_cmd: cmd = mvumi_create_internal_cmd(mhba, 0); 805 if (!cmd) { 806 if (retry++ >= 5) { 807 dev_err(&mhba->pdev->dev, "failed to get memory" 808 " for internal flush cache cmd for " 809 "device %d", device_id); 810 retry = 0; 811 continue; 812 } else 813 goto get_cmd; 814 } 815 cmd->scmd = NULL; 816 cmd->cmd_status = REQ_STATUS_PENDING; 817 atomic_set(&cmd->sync_cmd, 0); 818 frame = cmd->frame; 819 frame->req_function = CL_FUN_SCSI_CMD; 820 frame->device_id = device_id; 821 frame->cmd_flag = CMD_FLAG_NON_DATA; 822 frame->data_transfer_length = 0; 823 frame->cdb_length = MAX_COMMAND_SIZE; 824 memset(frame->cdb, 0, MAX_COMMAND_SIZE); 825 frame->cdb[0] = SCSI_CMD_MARVELL_SPECIFIC; 826 frame->cdb[1] = CDB_CORE_MODULE; 827 frame->cdb[2] = CDB_CORE_SHUTDOWN; 828 829 mvumi_issue_blocked_cmd(mhba, cmd); 830 if (cmd->cmd_status != SAM_STAT_GOOD) { 831 dev_err(&mhba->pdev->dev, 832 "device %d flush cache failed, status=0x%x.\n", 833 device_id, cmd->cmd_status); 834 } 835 836 mvumi_delete_internal_cmd(mhba, cmd); 837 } 838 return 0; 839 } 840 841 static unsigned char 842 mvumi_calculate_checksum(struct mvumi_hs_header *p_header, 843 unsigned short len) 844 { 845 unsigned char *ptr; 846 unsigned char ret = 0, i; 847 848 ptr = (unsigned char *) p_header->frame_content; 849 for (i = 0; i < len; i++) { 850 ret ^= *ptr; 851 ptr++; 852 } 853 854 return ret; 855 } 856 857 static void mvumi_hs_build_page(struct mvumi_hba *mhba, 858 struct mvumi_hs_header *hs_header) 859 { 860 struct mvumi_hs_page2 *hs_page2; 861 struct mvumi_hs_page4 *hs_page4; 862 struct mvumi_hs_page3 *hs_page3; 863 u64 time; 864 u64 local_time; 865 866 switch (hs_header->page_code) { 867 case HS_PAGE_HOST_INFO: 868 hs_page2 = (struct mvumi_hs_page2 *) hs_header; 869 hs_header->frame_length = sizeof(*hs_page2) - 4; 870 memset(hs_header->frame_content, 0, hs_header->frame_length); 871 hs_page2->host_type = 3; /* 3 mean linux*/ 872 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) 873 hs_page2->host_cap = 0x08;/* host dynamic source mode */ 874 hs_page2->host_ver.ver_major = VER_MAJOR; 875 hs_page2->host_ver.ver_minor = VER_MINOR; 876 hs_page2->host_ver.ver_oem = VER_OEM; 877 hs_page2->host_ver.ver_build = VER_BUILD; 878 hs_page2->system_io_bus = 0; 879 hs_page2->slot_number = 0; 880 hs_page2->intr_level = 0; 881 hs_page2->intr_vector = 0; 882 time = ktime_get_real_seconds(); 883 local_time = (time - (sys_tz.tz_minuteswest * 60)); 884 hs_page2->seconds_since1970 = local_time; 885 hs_header->checksum = mvumi_calculate_checksum(hs_header, 886 hs_header->frame_length); 887 break; 888 889 case HS_PAGE_FIRM_CTL: 890 hs_page3 = (struct mvumi_hs_page3 *) hs_header; 891 hs_header->frame_length = sizeof(*hs_page3) - 4; 892 memset(hs_header->frame_content, 0, hs_header->frame_length); 893 hs_header->checksum = mvumi_calculate_checksum(hs_header, 894 hs_header->frame_length); 895 break; 896 897 case HS_PAGE_CL_INFO: 898 hs_page4 = (struct mvumi_hs_page4 *) hs_header; 899 hs_header->frame_length = sizeof(*hs_page4) - 4; 900 memset(hs_header->frame_content, 0, hs_header->frame_length); 901 hs_page4->ib_baseaddr_l = lower_32_bits(mhba->ib_list_phys); 902 hs_page4->ib_baseaddr_h = upper_32_bits(mhba->ib_list_phys); 903 904 hs_page4->ob_baseaddr_l = lower_32_bits(mhba->ob_list_phys); 905 hs_page4->ob_baseaddr_h = upper_32_bits(mhba->ob_list_phys); 906 hs_page4->ib_entry_size = mhba->ib_max_size_setting; 907 hs_page4->ob_entry_size = mhba->ob_max_size_setting; 908 if (mhba->hba_capability 909 & HS_CAPABILITY_NEW_PAGE_IO_DEPTH_DEF) { 910 hs_page4->ob_depth = find_first_bit((unsigned long *) 911 &mhba->list_num_io, 912 BITS_PER_LONG); 913 hs_page4->ib_depth = find_first_bit((unsigned long *) 914 &mhba->list_num_io, 915 BITS_PER_LONG); 916 } else { 917 hs_page4->ob_depth = (u8) mhba->list_num_io; 918 hs_page4->ib_depth = (u8) mhba->list_num_io; 919 } 920 hs_header->checksum = mvumi_calculate_checksum(hs_header, 921 hs_header->frame_length); 922 break; 923 924 default: 925 dev_err(&mhba->pdev->dev, "cannot build page, code[0x%x]\n", 926 hs_header->page_code); 927 break; 928 } 929 } 930 931 /** 932 * mvumi_init_data - Initialize requested date for FW 933 * @mhba: Adapter soft state 934 */ 935 static int mvumi_init_data(struct mvumi_hba *mhba) 936 { 937 struct mvumi_ob_data *ob_pool; 938 struct mvumi_res *res_mgnt; 939 unsigned int tmp_size, offset, i; 940 void *virmem, *v; 941 dma_addr_t p; 942 943 if (mhba->fw_flag & MVUMI_FW_ALLOC) 944 return 0; 945 946 tmp_size = mhba->ib_max_size * mhba->max_io; 947 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) 948 tmp_size += sizeof(struct mvumi_dyn_list_entry) * mhba->max_io; 949 950 tmp_size += 128 + mhba->ob_max_size * mhba->max_io; 951 tmp_size += 8 + sizeof(u32)*2 + 16; 952 953 res_mgnt = mvumi_alloc_mem_resource(mhba, 954 RESOURCE_UNCACHED_MEMORY, tmp_size); 955 if (!res_mgnt) { 956 dev_err(&mhba->pdev->dev, 957 "failed to allocate memory for inbound list\n"); 958 goto fail_alloc_dma_buf; 959 } 960 961 p = res_mgnt->bus_addr; 962 v = res_mgnt->virt_addr; 963 /* ib_list */ 964 offset = round_up(p, 128) - p; 965 p += offset; 966 v += offset; 967 mhba->ib_list = v; 968 mhba->ib_list_phys = p; 969 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 970 v += sizeof(struct mvumi_dyn_list_entry) * mhba->max_io; 971 p += sizeof(struct mvumi_dyn_list_entry) * mhba->max_io; 972 mhba->ib_frame = v; 973 mhba->ib_frame_phys = p; 974 } 975 v += mhba->ib_max_size * mhba->max_io; 976 p += mhba->ib_max_size * mhba->max_io; 977 978 /* ib shadow */ 979 offset = round_up(p, 8) - p; 980 p += offset; 981 v += offset; 982 mhba->ib_shadow = v; 983 mhba->ib_shadow_phys = p; 984 p += sizeof(u32)*2; 985 v += sizeof(u32)*2; 986 /* ob shadow */ 987 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) { 988 offset = round_up(p, 8) - p; 989 p += offset; 990 v += offset; 991 mhba->ob_shadow = v; 992 mhba->ob_shadow_phys = p; 993 p += 8; 994 v += 8; 995 } else { 996 offset = round_up(p, 4) - p; 997 p += offset; 998 v += offset; 999 mhba->ob_shadow = v; 1000 mhba->ob_shadow_phys = p; 1001 p += 4; 1002 v += 4; 1003 } 1004 1005 /* ob list */ 1006 offset = round_up(p, 128) - p; 1007 p += offset; 1008 v += offset; 1009 1010 mhba->ob_list = v; 1011 mhba->ob_list_phys = p; 1012 1013 /* ob data pool */ 1014 tmp_size = mhba->max_io * (mhba->ob_max_size + sizeof(*ob_pool)); 1015 tmp_size = round_up(tmp_size, 8); 1016 1017 res_mgnt = mvumi_alloc_mem_resource(mhba, 1018 RESOURCE_CACHED_MEMORY, tmp_size); 1019 if (!res_mgnt) { 1020 dev_err(&mhba->pdev->dev, 1021 "failed to allocate memory for outbound data buffer\n"); 1022 goto fail_alloc_dma_buf; 1023 } 1024 virmem = res_mgnt->virt_addr; 1025 1026 for (i = mhba->max_io; i != 0; i--) { 1027 ob_pool = (struct mvumi_ob_data *) virmem; 1028 list_add_tail(&ob_pool->list, &mhba->ob_data_list); 1029 virmem += mhba->ob_max_size + sizeof(*ob_pool); 1030 } 1031 1032 tmp_size = sizeof(unsigned short) * mhba->max_io + 1033 sizeof(struct mvumi_cmd *) * mhba->max_io; 1034 tmp_size += round_up(mhba->max_target_id, sizeof(unsigned char) * 8) / 1035 (sizeof(unsigned char) * 8); 1036 1037 res_mgnt = mvumi_alloc_mem_resource(mhba, 1038 RESOURCE_CACHED_MEMORY, tmp_size); 1039 if (!res_mgnt) { 1040 dev_err(&mhba->pdev->dev, 1041 "failed to allocate memory for tag and target map\n"); 1042 goto fail_alloc_dma_buf; 1043 } 1044 1045 virmem = res_mgnt->virt_addr; 1046 mhba->tag_pool.stack = virmem; 1047 mhba->tag_pool.size = mhba->max_io; 1048 tag_init(&mhba->tag_pool, mhba->max_io); 1049 virmem += sizeof(unsigned short) * mhba->max_io; 1050 1051 mhba->tag_cmd = virmem; 1052 virmem += sizeof(struct mvumi_cmd *) * mhba->max_io; 1053 1054 mhba->target_map = virmem; 1055 1056 mhba->fw_flag |= MVUMI_FW_ALLOC; 1057 return 0; 1058 1059 fail_alloc_dma_buf: 1060 mvumi_release_mem_resource(mhba); 1061 return -1; 1062 } 1063 1064 static int mvumi_hs_process_page(struct mvumi_hba *mhba, 1065 struct mvumi_hs_header *hs_header) 1066 { 1067 struct mvumi_hs_page1 *hs_page1; 1068 unsigned char page_checksum; 1069 1070 page_checksum = mvumi_calculate_checksum(hs_header, 1071 hs_header->frame_length); 1072 if (page_checksum != hs_header->checksum) { 1073 dev_err(&mhba->pdev->dev, "checksum error\n"); 1074 return -1; 1075 } 1076 1077 switch (hs_header->page_code) { 1078 case HS_PAGE_FIRM_CAP: 1079 hs_page1 = (struct mvumi_hs_page1 *) hs_header; 1080 1081 mhba->max_io = hs_page1->max_io_support; 1082 mhba->list_num_io = hs_page1->cl_inout_list_depth; 1083 mhba->max_transfer_size = hs_page1->max_transfer_size; 1084 mhba->max_target_id = hs_page1->max_devices_support; 1085 mhba->hba_capability = hs_page1->capability; 1086 mhba->ib_max_size_setting = hs_page1->cl_in_max_entry_size; 1087 mhba->ib_max_size = (1 << hs_page1->cl_in_max_entry_size) << 2; 1088 1089 mhba->ob_max_size_setting = hs_page1->cl_out_max_entry_size; 1090 mhba->ob_max_size = (1 << hs_page1->cl_out_max_entry_size) << 2; 1091 1092 dev_dbg(&mhba->pdev->dev, "FW version:%d\n", 1093 hs_page1->fw_ver.ver_build); 1094 1095 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_COMPACT_SG) 1096 mhba->eot_flag = 22; 1097 else 1098 mhba->eot_flag = 27; 1099 if (mhba->hba_capability & HS_CAPABILITY_NEW_PAGE_IO_DEPTH_DEF) 1100 mhba->list_num_io = 1 << hs_page1->cl_inout_list_depth; 1101 break; 1102 default: 1103 dev_err(&mhba->pdev->dev, "handshake: page code error\n"); 1104 return -1; 1105 } 1106 return 0; 1107 } 1108 1109 /** 1110 * mvumi_handshake - Move the FW to READY state 1111 * @mhba: Adapter soft state 1112 * 1113 * During the initialization, FW passes can potentially be in any one of 1114 * several possible states. If the FW in operational, waiting-for-handshake 1115 * states, driver must take steps to bring it to ready state. Otherwise, it 1116 * has to wait for the ready state. 1117 */ 1118 static int mvumi_handshake(struct mvumi_hba *mhba) 1119 { 1120 unsigned int hs_state, tmp, hs_fun; 1121 struct mvumi_hs_header *hs_header; 1122 struct mvumi_hw_regs *regs = mhba->regs; 1123 1124 if (mhba->fw_state == FW_STATE_STARTING) 1125 hs_state = HS_S_START; 1126 else { 1127 tmp = ioread32(regs->arm_to_pciea_msg0); 1128 hs_state = HS_GET_STATE(tmp); 1129 dev_dbg(&mhba->pdev->dev, "handshake state[0x%x].\n", hs_state); 1130 if (HS_GET_STATUS(tmp) != HS_STATUS_OK) { 1131 mhba->fw_state = FW_STATE_STARTING; 1132 return -1; 1133 } 1134 } 1135 1136 hs_fun = 0; 1137 switch (hs_state) { 1138 case HS_S_START: 1139 mhba->fw_state = FW_STATE_HANDSHAKING; 1140 HS_SET_STATUS(hs_fun, HS_STATUS_OK); 1141 HS_SET_STATE(hs_fun, HS_S_RESET); 1142 iowrite32(HANDSHAKE_SIGNATURE, regs->pciea_to_arm_msg1); 1143 iowrite32(hs_fun, regs->pciea_to_arm_msg0); 1144 iowrite32(DRBL_HANDSHAKE, regs->pciea_to_arm_drbl_reg); 1145 break; 1146 1147 case HS_S_RESET: 1148 iowrite32(lower_32_bits(mhba->handshake_page_phys), 1149 regs->pciea_to_arm_msg1); 1150 iowrite32(upper_32_bits(mhba->handshake_page_phys), 1151 regs->arm_to_pciea_msg1); 1152 HS_SET_STATUS(hs_fun, HS_STATUS_OK); 1153 HS_SET_STATE(hs_fun, HS_S_PAGE_ADDR); 1154 iowrite32(hs_fun, regs->pciea_to_arm_msg0); 1155 iowrite32(DRBL_HANDSHAKE, regs->pciea_to_arm_drbl_reg); 1156 break; 1157 1158 case HS_S_PAGE_ADDR: 1159 case HS_S_QUERY_PAGE: 1160 case HS_S_SEND_PAGE: 1161 hs_header = (struct mvumi_hs_header *) mhba->handshake_page; 1162 if (hs_header->page_code == HS_PAGE_FIRM_CAP) { 1163 mhba->hba_total_pages = 1164 ((struct mvumi_hs_page1 *) hs_header)->total_pages; 1165 1166 if (mhba->hba_total_pages == 0) 1167 mhba->hba_total_pages = HS_PAGE_TOTAL-1; 1168 } 1169 1170 if (hs_state == HS_S_QUERY_PAGE) { 1171 if (mvumi_hs_process_page(mhba, hs_header)) { 1172 HS_SET_STATE(hs_fun, HS_S_ABORT); 1173 return -1; 1174 } 1175 if (mvumi_init_data(mhba)) { 1176 HS_SET_STATE(hs_fun, HS_S_ABORT); 1177 return -1; 1178 } 1179 } else if (hs_state == HS_S_PAGE_ADDR) { 1180 hs_header->page_code = 0; 1181 mhba->hba_total_pages = HS_PAGE_TOTAL-1; 1182 } 1183 1184 if ((hs_header->page_code + 1) <= mhba->hba_total_pages) { 1185 hs_header->page_code++; 1186 if (hs_header->page_code != HS_PAGE_FIRM_CAP) { 1187 mvumi_hs_build_page(mhba, hs_header); 1188 HS_SET_STATE(hs_fun, HS_S_SEND_PAGE); 1189 } else 1190 HS_SET_STATE(hs_fun, HS_S_QUERY_PAGE); 1191 } else 1192 HS_SET_STATE(hs_fun, HS_S_END); 1193 1194 HS_SET_STATUS(hs_fun, HS_STATUS_OK); 1195 iowrite32(hs_fun, regs->pciea_to_arm_msg0); 1196 iowrite32(DRBL_HANDSHAKE, regs->pciea_to_arm_drbl_reg); 1197 break; 1198 1199 case HS_S_END: 1200 /* Set communication list ISR */ 1201 tmp = ioread32(regs->enpointa_mask_reg); 1202 tmp |= regs->int_comaout | regs->int_comaerr; 1203 iowrite32(tmp, regs->enpointa_mask_reg); 1204 iowrite32(mhba->list_num_io, mhba->ib_shadow); 1205 /* Set InBound List Available count shadow */ 1206 iowrite32(lower_32_bits(mhba->ib_shadow_phys), 1207 regs->inb_aval_count_basel); 1208 iowrite32(upper_32_bits(mhba->ib_shadow_phys), 1209 regs->inb_aval_count_baseh); 1210 1211 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9143) { 1212 /* Set OutBound List Available count shadow */ 1213 iowrite32((mhba->list_num_io-1) | 1214 regs->cl_pointer_toggle, 1215 mhba->ob_shadow); 1216 iowrite32(lower_32_bits(mhba->ob_shadow_phys), 1217 regs->outb_copy_basel); 1218 iowrite32(upper_32_bits(mhba->ob_shadow_phys), 1219 regs->outb_copy_baseh); 1220 } 1221 1222 mhba->ib_cur_slot = (mhba->list_num_io - 1) | 1223 regs->cl_pointer_toggle; 1224 mhba->ob_cur_slot = (mhba->list_num_io - 1) | 1225 regs->cl_pointer_toggle; 1226 mhba->fw_state = FW_STATE_STARTED; 1227 1228 break; 1229 default: 1230 dev_err(&mhba->pdev->dev, "unknown handshake state [0x%x].\n", 1231 hs_state); 1232 return -1; 1233 } 1234 return 0; 1235 } 1236 1237 static unsigned char mvumi_handshake_event(struct mvumi_hba *mhba) 1238 { 1239 unsigned int isr_status; 1240 unsigned long before; 1241 1242 before = jiffies; 1243 mvumi_handshake(mhba); 1244 do { 1245 isr_status = mhba->instancet->read_fw_status_reg(mhba); 1246 1247 if (mhba->fw_state == FW_STATE_STARTED) 1248 return 0; 1249 if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) { 1250 dev_err(&mhba->pdev->dev, 1251 "no handshake response at state 0x%x.\n", 1252 mhba->fw_state); 1253 dev_err(&mhba->pdev->dev, 1254 "isr : global=0x%x,status=0x%x.\n", 1255 mhba->global_isr, isr_status); 1256 return -1; 1257 } 1258 rmb(); 1259 usleep_range(1000, 2000); 1260 } while (!(isr_status & DRBL_HANDSHAKE_ISR)); 1261 1262 return 0; 1263 } 1264 1265 static unsigned char mvumi_check_handshake(struct mvumi_hba *mhba) 1266 { 1267 unsigned int tmp; 1268 unsigned long before; 1269 1270 before = jiffies; 1271 tmp = ioread32(mhba->regs->arm_to_pciea_msg1); 1272 while ((tmp != HANDSHAKE_READYSTATE) && (tmp != HANDSHAKE_DONESTATE)) { 1273 if (tmp != HANDSHAKE_READYSTATE) 1274 iowrite32(DRBL_MU_RESET, 1275 mhba->regs->pciea_to_arm_drbl_reg); 1276 if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) { 1277 dev_err(&mhba->pdev->dev, 1278 "invalid signature [0x%x].\n", tmp); 1279 return -1; 1280 } 1281 usleep_range(1000, 2000); 1282 rmb(); 1283 tmp = ioread32(mhba->regs->arm_to_pciea_msg1); 1284 } 1285 1286 mhba->fw_state = FW_STATE_STARTING; 1287 dev_dbg(&mhba->pdev->dev, "start firmware handshake...\n"); 1288 do { 1289 if (mvumi_handshake_event(mhba)) { 1290 dev_err(&mhba->pdev->dev, 1291 "handshake failed at state 0x%x.\n", 1292 mhba->fw_state); 1293 return -1; 1294 } 1295 } while (mhba->fw_state != FW_STATE_STARTED); 1296 1297 dev_dbg(&mhba->pdev->dev, "firmware handshake done\n"); 1298 1299 return 0; 1300 } 1301 1302 static unsigned char mvumi_start(struct mvumi_hba *mhba) 1303 { 1304 unsigned int tmp; 1305 struct mvumi_hw_regs *regs = mhba->regs; 1306 1307 /* clear Door bell */ 1308 tmp = ioread32(regs->arm_to_pciea_drbl_reg); 1309 iowrite32(tmp, regs->arm_to_pciea_drbl_reg); 1310 1311 iowrite32(regs->int_drbl_int_mask, regs->arm_to_pciea_mask_reg); 1312 tmp = ioread32(regs->enpointa_mask_reg) | regs->int_dl_cpu2pciea; 1313 iowrite32(tmp, regs->enpointa_mask_reg); 1314 msleep(100); 1315 if (mvumi_check_handshake(mhba)) 1316 return -1; 1317 1318 return 0; 1319 } 1320 1321 /** 1322 * mvumi_complete_cmd - Completes a command 1323 * @mhba: Adapter soft state 1324 * @cmd: Command to be completed 1325 */ 1326 static void mvumi_complete_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd, 1327 struct mvumi_rsp_frame *ob_frame) 1328 { 1329 struct scsi_cmnd *scmd = cmd->scmd; 1330 1331 cmd->scmd->SCp.ptr = NULL; 1332 scmd->result = ob_frame->req_status; 1333 1334 switch (ob_frame->req_status) { 1335 case SAM_STAT_GOOD: 1336 scmd->result |= DID_OK << 16; 1337 break; 1338 case SAM_STAT_BUSY: 1339 scmd->result |= DID_BUS_BUSY << 16; 1340 break; 1341 case SAM_STAT_CHECK_CONDITION: 1342 scmd->result |= (DID_OK << 16); 1343 if (ob_frame->rsp_flag & CL_RSP_FLAG_SENSEDATA) { 1344 memcpy(cmd->scmd->sense_buffer, ob_frame->payload, 1345 sizeof(struct mvumi_sense_data)); 1346 scmd->result |= (DRIVER_SENSE << 24); 1347 } 1348 break; 1349 default: 1350 scmd->result |= (DRIVER_INVALID << 24) | (DID_ABORT << 16); 1351 break; 1352 } 1353 1354 if (scsi_bufflen(scmd)) { 1355 if (scsi_sg_count(scmd)) { 1356 pci_unmap_sg(mhba->pdev, 1357 scsi_sglist(scmd), 1358 scsi_sg_count(scmd), 1359 (int) scmd->sc_data_direction); 1360 } else { 1361 pci_unmap_single(mhba->pdev, 1362 scmd->SCp.dma_handle, 1363 scsi_bufflen(scmd), 1364 (int) scmd->sc_data_direction); 1365 1366 scmd->SCp.dma_handle = 0; 1367 } 1368 } 1369 cmd->scmd->scsi_done(scmd); 1370 mvumi_return_cmd(mhba, cmd); 1371 } 1372 1373 static void mvumi_complete_internal_cmd(struct mvumi_hba *mhba, 1374 struct mvumi_cmd *cmd, 1375 struct mvumi_rsp_frame *ob_frame) 1376 { 1377 if (atomic_read(&cmd->sync_cmd)) { 1378 cmd->cmd_status = ob_frame->req_status; 1379 1380 if ((ob_frame->req_status == SAM_STAT_CHECK_CONDITION) && 1381 (ob_frame->rsp_flag & CL_RSP_FLAG_SENSEDATA) && 1382 cmd->data_buf) { 1383 memcpy(cmd->data_buf, ob_frame->payload, 1384 sizeof(struct mvumi_sense_data)); 1385 } 1386 atomic_dec(&cmd->sync_cmd); 1387 wake_up(&mhba->int_cmd_wait_q); 1388 } 1389 } 1390 1391 static void mvumi_show_event(struct mvumi_hba *mhba, 1392 struct mvumi_driver_event *ptr) 1393 { 1394 unsigned int i; 1395 1396 dev_warn(&mhba->pdev->dev, 1397 "Event[0x%x] id[0x%x] severity[0x%x] device id[0x%x]\n", 1398 ptr->sequence_no, ptr->event_id, ptr->severity, ptr->device_id); 1399 if (ptr->param_count) { 1400 printk(KERN_WARNING "Event param(len 0x%x): ", 1401 ptr->param_count); 1402 for (i = 0; i < ptr->param_count; i++) 1403 printk(KERN_WARNING "0x%x ", ptr->params[i]); 1404 1405 printk(KERN_WARNING "\n"); 1406 } 1407 1408 if (ptr->sense_data_length) { 1409 printk(KERN_WARNING "Event sense data(len 0x%x): ", 1410 ptr->sense_data_length); 1411 for (i = 0; i < ptr->sense_data_length; i++) 1412 printk(KERN_WARNING "0x%x ", ptr->sense_data[i]); 1413 printk(KERN_WARNING "\n"); 1414 } 1415 } 1416 1417 static int mvumi_handle_hotplug(struct mvumi_hba *mhba, u16 devid, int status) 1418 { 1419 struct scsi_device *sdev; 1420 int ret = -1; 1421 1422 if (status == DEVICE_OFFLINE) { 1423 sdev = scsi_device_lookup(mhba->shost, 0, devid, 0); 1424 if (sdev) { 1425 dev_dbg(&mhba->pdev->dev, "remove disk %d-%d-%d.\n", 0, 1426 sdev->id, 0); 1427 scsi_remove_device(sdev); 1428 scsi_device_put(sdev); 1429 ret = 0; 1430 } else 1431 dev_err(&mhba->pdev->dev, " no disk[%d] to remove\n", 1432 devid); 1433 } else if (status == DEVICE_ONLINE) { 1434 sdev = scsi_device_lookup(mhba->shost, 0, devid, 0); 1435 if (!sdev) { 1436 scsi_add_device(mhba->shost, 0, devid, 0); 1437 dev_dbg(&mhba->pdev->dev, " add disk %d-%d-%d.\n", 0, 1438 devid, 0); 1439 ret = 0; 1440 } else { 1441 dev_err(&mhba->pdev->dev, " don't add disk %d-%d-%d.\n", 1442 0, devid, 0); 1443 scsi_device_put(sdev); 1444 } 1445 } 1446 return ret; 1447 } 1448 1449 static u64 mvumi_inquiry(struct mvumi_hba *mhba, 1450 unsigned int id, struct mvumi_cmd *cmd) 1451 { 1452 struct mvumi_msg_frame *frame; 1453 u64 wwid = 0; 1454 int cmd_alloc = 0; 1455 int data_buf_len = 64; 1456 1457 if (!cmd) { 1458 cmd = mvumi_create_internal_cmd(mhba, data_buf_len); 1459 if (cmd) 1460 cmd_alloc = 1; 1461 else 1462 return 0; 1463 } else { 1464 memset(cmd->data_buf, 0, data_buf_len); 1465 } 1466 cmd->scmd = NULL; 1467 cmd->cmd_status = REQ_STATUS_PENDING; 1468 atomic_set(&cmd->sync_cmd, 0); 1469 frame = cmd->frame; 1470 frame->device_id = (u16) id; 1471 frame->cmd_flag = CMD_FLAG_DATA_IN; 1472 frame->req_function = CL_FUN_SCSI_CMD; 1473 frame->cdb_length = 6; 1474 frame->data_transfer_length = MVUMI_INQUIRY_LENGTH; 1475 memset(frame->cdb, 0, frame->cdb_length); 1476 frame->cdb[0] = INQUIRY; 1477 frame->cdb[4] = frame->data_transfer_length; 1478 1479 mvumi_issue_blocked_cmd(mhba, cmd); 1480 1481 if (cmd->cmd_status == SAM_STAT_GOOD) { 1482 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9143) 1483 wwid = id + 1; 1484 else 1485 memcpy((void *)&wwid, 1486 (cmd->data_buf + MVUMI_INQUIRY_UUID_OFF), 1487 MVUMI_INQUIRY_UUID_LEN); 1488 dev_dbg(&mhba->pdev->dev, 1489 "inquiry device(0:%d:0) wwid(%llx)\n", id, wwid); 1490 } else { 1491 wwid = 0; 1492 } 1493 if (cmd_alloc) 1494 mvumi_delete_internal_cmd(mhba, cmd); 1495 1496 return wwid; 1497 } 1498 1499 static void mvumi_detach_devices(struct mvumi_hba *mhba) 1500 { 1501 struct mvumi_device *mv_dev = NULL , *dev_next; 1502 struct scsi_device *sdev = NULL; 1503 1504 mutex_lock(&mhba->device_lock); 1505 1506 /* detach Hard Disk */ 1507 list_for_each_entry_safe(mv_dev, dev_next, 1508 &mhba->shost_dev_list, list) { 1509 mvumi_handle_hotplug(mhba, mv_dev->id, DEVICE_OFFLINE); 1510 list_del_init(&mv_dev->list); 1511 dev_dbg(&mhba->pdev->dev, "release device(0:%d:0) wwid(%llx)\n", 1512 mv_dev->id, mv_dev->wwid); 1513 kfree(mv_dev); 1514 } 1515 list_for_each_entry_safe(mv_dev, dev_next, &mhba->mhba_dev_list, list) { 1516 list_del_init(&mv_dev->list); 1517 dev_dbg(&mhba->pdev->dev, "release device(0:%d:0) wwid(%llx)\n", 1518 mv_dev->id, mv_dev->wwid); 1519 kfree(mv_dev); 1520 } 1521 1522 /* detach virtual device */ 1523 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) 1524 sdev = scsi_device_lookup(mhba->shost, 0, 1525 mhba->max_target_id - 1, 0); 1526 1527 if (sdev) { 1528 scsi_remove_device(sdev); 1529 scsi_device_put(sdev); 1530 } 1531 1532 mutex_unlock(&mhba->device_lock); 1533 } 1534 1535 static void mvumi_rescan_devices(struct mvumi_hba *mhba, int id) 1536 { 1537 struct scsi_device *sdev; 1538 1539 sdev = scsi_device_lookup(mhba->shost, 0, id, 0); 1540 if (sdev) { 1541 scsi_rescan_device(&sdev->sdev_gendev); 1542 scsi_device_put(sdev); 1543 } 1544 } 1545 1546 static int mvumi_match_devices(struct mvumi_hba *mhba, int id, u64 wwid) 1547 { 1548 struct mvumi_device *mv_dev = NULL; 1549 1550 list_for_each_entry(mv_dev, &mhba->shost_dev_list, list) { 1551 if (mv_dev->wwid == wwid) { 1552 if (mv_dev->id != id) { 1553 dev_err(&mhba->pdev->dev, 1554 "%s has same wwid[%llx] ," 1555 " but different id[%d %d]\n", 1556 __func__, mv_dev->wwid, mv_dev->id, id); 1557 return -1; 1558 } else { 1559 if (mhba->pdev->device == 1560 PCI_DEVICE_ID_MARVELL_MV9143) 1561 mvumi_rescan_devices(mhba, id); 1562 return 1; 1563 } 1564 } 1565 } 1566 return 0; 1567 } 1568 1569 static void mvumi_remove_devices(struct mvumi_hba *mhba, int id) 1570 { 1571 struct mvumi_device *mv_dev = NULL, *dev_next; 1572 1573 list_for_each_entry_safe(mv_dev, dev_next, 1574 &mhba->shost_dev_list, list) { 1575 if (mv_dev->id == id) { 1576 dev_dbg(&mhba->pdev->dev, 1577 "detach device(0:%d:0) wwid(%llx) from HOST\n", 1578 mv_dev->id, mv_dev->wwid); 1579 mvumi_handle_hotplug(mhba, mv_dev->id, DEVICE_OFFLINE); 1580 list_del_init(&mv_dev->list); 1581 kfree(mv_dev); 1582 } 1583 } 1584 } 1585 1586 static int mvumi_probe_devices(struct mvumi_hba *mhba) 1587 { 1588 int id, maxid; 1589 u64 wwid = 0; 1590 struct mvumi_device *mv_dev = NULL; 1591 struct mvumi_cmd *cmd = NULL; 1592 int found = 0; 1593 1594 cmd = mvumi_create_internal_cmd(mhba, 64); 1595 if (!cmd) 1596 return -1; 1597 1598 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9143) 1599 maxid = mhba->max_target_id; 1600 else 1601 maxid = mhba->max_target_id - 1; 1602 1603 for (id = 0; id < maxid; id++) { 1604 wwid = mvumi_inquiry(mhba, id, cmd); 1605 if (!wwid) { 1606 /* device no response, remove it */ 1607 mvumi_remove_devices(mhba, id); 1608 } else { 1609 /* device response, add it */ 1610 found = mvumi_match_devices(mhba, id, wwid); 1611 if (!found) { 1612 mvumi_remove_devices(mhba, id); 1613 mv_dev = kzalloc(sizeof(struct mvumi_device), 1614 GFP_KERNEL); 1615 if (!mv_dev) { 1616 dev_err(&mhba->pdev->dev, 1617 "%s alloc mv_dev failed\n", 1618 __func__); 1619 continue; 1620 } 1621 mv_dev->id = id; 1622 mv_dev->wwid = wwid; 1623 mv_dev->sdev = NULL; 1624 INIT_LIST_HEAD(&mv_dev->list); 1625 list_add_tail(&mv_dev->list, 1626 &mhba->mhba_dev_list); 1627 dev_dbg(&mhba->pdev->dev, 1628 "probe a new device(0:%d:0)" 1629 " wwid(%llx)\n", id, mv_dev->wwid); 1630 } else if (found == -1) 1631 return -1; 1632 else 1633 continue; 1634 } 1635 } 1636 1637 if (cmd) 1638 mvumi_delete_internal_cmd(mhba, cmd); 1639 1640 return 0; 1641 } 1642 1643 static int mvumi_rescan_bus(void *data) 1644 { 1645 int ret = 0; 1646 struct mvumi_hba *mhba = (struct mvumi_hba *) data; 1647 struct mvumi_device *mv_dev = NULL , *dev_next; 1648 1649 while (!kthread_should_stop()) { 1650 1651 set_current_state(TASK_INTERRUPTIBLE); 1652 if (!atomic_read(&mhba->pnp_count)) 1653 schedule(); 1654 msleep(1000); 1655 atomic_set(&mhba->pnp_count, 0); 1656 __set_current_state(TASK_RUNNING); 1657 1658 mutex_lock(&mhba->device_lock); 1659 ret = mvumi_probe_devices(mhba); 1660 if (!ret) { 1661 list_for_each_entry_safe(mv_dev, dev_next, 1662 &mhba->mhba_dev_list, list) { 1663 if (mvumi_handle_hotplug(mhba, mv_dev->id, 1664 DEVICE_ONLINE)) { 1665 dev_err(&mhba->pdev->dev, 1666 "%s add device(0:%d:0) failed" 1667 "wwid(%llx) has exist\n", 1668 __func__, 1669 mv_dev->id, mv_dev->wwid); 1670 list_del_init(&mv_dev->list); 1671 kfree(mv_dev); 1672 } else { 1673 list_move_tail(&mv_dev->list, 1674 &mhba->shost_dev_list); 1675 } 1676 } 1677 } 1678 mutex_unlock(&mhba->device_lock); 1679 } 1680 return 0; 1681 } 1682 1683 static void mvumi_proc_msg(struct mvumi_hba *mhba, 1684 struct mvumi_hotplug_event *param) 1685 { 1686 u16 size = param->size; 1687 const unsigned long *ar_bitmap; 1688 const unsigned long *re_bitmap; 1689 int index; 1690 1691 if (mhba->fw_flag & MVUMI_FW_ATTACH) { 1692 index = -1; 1693 ar_bitmap = (const unsigned long *) param->bitmap; 1694 re_bitmap = (const unsigned long *) &param->bitmap[size >> 3]; 1695 1696 mutex_lock(&mhba->sas_discovery_mutex); 1697 do { 1698 index = find_next_zero_bit(ar_bitmap, size, index + 1); 1699 if (index >= size) 1700 break; 1701 mvumi_handle_hotplug(mhba, index, DEVICE_ONLINE); 1702 } while (1); 1703 1704 index = -1; 1705 do { 1706 index = find_next_zero_bit(re_bitmap, size, index + 1); 1707 if (index >= size) 1708 break; 1709 mvumi_handle_hotplug(mhba, index, DEVICE_OFFLINE); 1710 } while (1); 1711 mutex_unlock(&mhba->sas_discovery_mutex); 1712 } 1713 } 1714 1715 static void mvumi_notification(struct mvumi_hba *mhba, u8 msg, void *buffer) 1716 { 1717 if (msg == APICDB1_EVENT_GETEVENT) { 1718 int i, count; 1719 struct mvumi_driver_event *param = NULL; 1720 struct mvumi_event_req *er = buffer; 1721 count = er->count; 1722 if (count > MAX_EVENTS_RETURNED) { 1723 dev_err(&mhba->pdev->dev, "event count[0x%x] is bigger" 1724 " than max event count[0x%x].\n", 1725 count, MAX_EVENTS_RETURNED); 1726 return; 1727 } 1728 for (i = 0; i < count; i++) { 1729 param = &er->events[i]; 1730 mvumi_show_event(mhba, param); 1731 } 1732 } else if (msg == APICDB1_HOST_GETEVENT) { 1733 mvumi_proc_msg(mhba, buffer); 1734 } 1735 } 1736 1737 static int mvumi_get_event(struct mvumi_hba *mhba, unsigned char msg) 1738 { 1739 struct mvumi_cmd *cmd; 1740 struct mvumi_msg_frame *frame; 1741 1742 cmd = mvumi_create_internal_cmd(mhba, 512); 1743 if (!cmd) 1744 return -1; 1745 cmd->scmd = NULL; 1746 cmd->cmd_status = REQ_STATUS_PENDING; 1747 atomic_set(&cmd->sync_cmd, 0); 1748 frame = cmd->frame; 1749 frame->device_id = 0; 1750 frame->cmd_flag = CMD_FLAG_DATA_IN; 1751 frame->req_function = CL_FUN_SCSI_CMD; 1752 frame->cdb_length = MAX_COMMAND_SIZE; 1753 frame->data_transfer_length = sizeof(struct mvumi_event_req); 1754 memset(frame->cdb, 0, MAX_COMMAND_SIZE); 1755 frame->cdb[0] = APICDB0_EVENT; 1756 frame->cdb[1] = msg; 1757 mvumi_issue_blocked_cmd(mhba, cmd); 1758 1759 if (cmd->cmd_status != SAM_STAT_GOOD) 1760 dev_err(&mhba->pdev->dev, "get event failed, status=0x%x.\n", 1761 cmd->cmd_status); 1762 else 1763 mvumi_notification(mhba, cmd->frame->cdb[1], cmd->data_buf); 1764 1765 mvumi_delete_internal_cmd(mhba, cmd); 1766 return 0; 1767 } 1768 1769 static void mvumi_scan_events(struct work_struct *work) 1770 { 1771 struct mvumi_events_wq *mu_ev = 1772 container_of(work, struct mvumi_events_wq, work_q); 1773 1774 mvumi_get_event(mu_ev->mhba, mu_ev->event); 1775 kfree(mu_ev); 1776 } 1777 1778 static void mvumi_launch_events(struct mvumi_hba *mhba, u32 isr_status) 1779 { 1780 struct mvumi_events_wq *mu_ev; 1781 1782 while (isr_status & (DRBL_BUS_CHANGE | DRBL_EVENT_NOTIFY)) { 1783 if (isr_status & DRBL_BUS_CHANGE) { 1784 atomic_inc(&mhba->pnp_count); 1785 wake_up_process(mhba->dm_thread); 1786 isr_status &= ~(DRBL_BUS_CHANGE); 1787 continue; 1788 } 1789 1790 mu_ev = kzalloc(sizeof(*mu_ev), GFP_ATOMIC); 1791 if (mu_ev) { 1792 INIT_WORK(&mu_ev->work_q, mvumi_scan_events); 1793 mu_ev->mhba = mhba; 1794 mu_ev->event = APICDB1_EVENT_GETEVENT; 1795 isr_status &= ~(DRBL_EVENT_NOTIFY); 1796 mu_ev->param = NULL; 1797 schedule_work(&mu_ev->work_q); 1798 } 1799 } 1800 } 1801 1802 static void mvumi_handle_clob(struct mvumi_hba *mhba) 1803 { 1804 struct mvumi_rsp_frame *ob_frame; 1805 struct mvumi_cmd *cmd; 1806 struct mvumi_ob_data *pool; 1807 1808 while (!list_empty(&mhba->free_ob_list)) { 1809 pool = list_first_entry(&mhba->free_ob_list, 1810 struct mvumi_ob_data, list); 1811 list_del_init(&pool->list); 1812 list_add_tail(&pool->list, &mhba->ob_data_list); 1813 1814 ob_frame = (struct mvumi_rsp_frame *) &pool->data[0]; 1815 cmd = mhba->tag_cmd[ob_frame->tag]; 1816 1817 atomic_dec(&mhba->fw_outstanding); 1818 mhba->tag_cmd[ob_frame->tag] = 0; 1819 tag_release_one(mhba, &mhba->tag_pool, ob_frame->tag); 1820 if (cmd->scmd) 1821 mvumi_complete_cmd(mhba, cmd, ob_frame); 1822 else 1823 mvumi_complete_internal_cmd(mhba, cmd, ob_frame); 1824 } 1825 mhba->instancet->fire_cmd(mhba, NULL); 1826 } 1827 1828 static irqreturn_t mvumi_isr_handler(int irq, void *devp) 1829 { 1830 struct mvumi_hba *mhba = (struct mvumi_hba *) devp; 1831 unsigned long flags; 1832 1833 spin_lock_irqsave(mhba->shost->host_lock, flags); 1834 if (unlikely(mhba->instancet->clear_intr(mhba) || !mhba->global_isr)) { 1835 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 1836 return IRQ_NONE; 1837 } 1838 1839 if (mhba->global_isr & mhba->regs->int_dl_cpu2pciea) { 1840 if (mhba->isr_status & (DRBL_BUS_CHANGE | DRBL_EVENT_NOTIFY)) 1841 mvumi_launch_events(mhba, mhba->isr_status); 1842 if (mhba->isr_status & DRBL_HANDSHAKE_ISR) { 1843 dev_warn(&mhba->pdev->dev, "enter handshake again!\n"); 1844 mvumi_handshake(mhba); 1845 } 1846 1847 } 1848 1849 if (mhba->global_isr & mhba->regs->int_comaout) 1850 mvumi_receive_ob_list_entry(mhba); 1851 1852 mhba->global_isr = 0; 1853 mhba->isr_status = 0; 1854 if (mhba->fw_state == FW_STATE_STARTED) 1855 mvumi_handle_clob(mhba); 1856 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 1857 return IRQ_HANDLED; 1858 } 1859 1860 static enum mvumi_qc_result mvumi_send_command(struct mvumi_hba *mhba, 1861 struct mvumi_cmd *cmd) 1862 { 1863 void *ib_entry; 1864 struct mvumi_msg_frame *ib_frame; 1865 unsigned int frame_len; 1866 1867 ib_frame = cmd->frame; 1868 if (unlikely(mhba->fw_state != FW_STATE_STARTED)) { 1869 dev_dbg(&mhba->pdev->dev, "firmware not ready.\n"); 1870 return MV_QUEUE_COMMAND_RESULT_NO_RESOURCE; 1871 } 1872 if (tag_is_empty(&mhba->tag_pool)) { 1873 dev_dbg(&mhba->pdev->dev, "no free tag.\n"); 1874 return MV_QUEUE_COMMAND_RESULT_NO_RESOURCE; 1875 } 1876 mvumi_get_ib_list_entry(mhba, &ib_entry); 1877 1878 cmd->frame->tag = tag_get_one(mhba, &mhba->tag_pool); 1879 cmd->frame->request_id = mhba->io_seq++; 1880 cmd->request_id = cmd->frame->request_id; 1881 mhba->tag_cmd[cmd->frame->tag] = cmd; 1882 frame_len = sizeof(*ib_frame) - 4 + 1883 ib_frame->sg_counts * sizeof(struct mvumi_sgl); 1884 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 1885 struct mvumi_dyn_list_entry *dle; 1886 dle = ib_entry; 1887 dle->src_low_addr = 1888 cpu_to_le32(lower_32_bits(cmd->frame_phys)); 1889 dle->src_high_addr = 1890 cpu_to_le32(upper_32_bits(cmd->frame_phys)); 1891 dle->if_length = (frame_len >> 2) & 0xFFF; 1892 } else { 1893 memcpy(ib_entry, ib_frame, frame_len); 1894 } 1895 return MV_QUEUE_COMMAND_RESULT_SENT; 1896 } 1897 1898 static void mvumi_fire_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd) 1899 { 1900 unsigned short num_of_cl_sent = 0; 1901 unsigned int count; 1902 enum mvumi_qc_result result; 1903 1904 if (cmd) 1905 list_add_tail(&cmd->queue_pointer, &mhba->waiting_req_list); 1906 count = mhba->instancet->check_ib_list(mhba); 1907 if (list_empty(&mhba->waiting_req_list) || !count) 1908 return; 1909 1910 do { 1911 cmd = list_first_entry(&mhba->waiting_req_list, 1912 struct mvumi_cmd, queue_pointer); 1913 list_del_init(&cmd->queue_pointer); 1914 result = mvumi_send_command(mhba, cmd); 1915 switch (result) { 1916 case MV_QUEUE_COMMAND_RESULT_SENT: 1917 num_of_cl_sent++; 1918 break; 1919 case MV_QUEUE_COMMAND_RESULT_NO_RESOURCE: 1920 list_add(&cmd->queue_pointer, &mhba->waiting_req_list); 1921 if (num_of_cl_sent > 0) 1922 mvumi_send_ib_list_entry(mhba); 1923 1924 return; 1925 } 1926 } while (!list_empty(&mhba->waiting_req_list) && count--); 1927 1928 if (num_of_cl_sent > 0) 1929 mvumi_send_ib_list_entry(mhba); 1930 } 1931 1932 /** 1933 * mvumi_enable_intr - Enables interrupts 1934 * @mhba: Adapter soft state 1935 */ 1936 static void mvumi_enable_intr(struct mvumi_hba *mhba) 1937 { 1938 unsigned int mask; 1939 struct mvumi_hw_regs *regs = mhba->regs; 1940 1941 iowrite32(regs->int_drbl_int_mask, regs->arm_to_pciea_mask_reg); 1942 mask = ioread32(regs->enpointa_mask_reg); 1943 mask |= regs->int_dl_cpu2pciea | regs->int_comaout | regs->int_comaerr; 1944 iowrite32(mask, regs->enpointa_mask_reg); 1945 } 1946 1947 /** 1948 * mvumi_disable_intr -Disables interrupt 1949 * @mhba: Adapter soft state 1950 */ 1951 static void mvumi_disable_intr(struct mvumi_hba *mhba) 1952 { 1953 unsigned int mask; 1954 struct mvumi_hw_regs *regs = mhba->regs; 1955 1956 iowrite32(0, regs->arm_to_pciea_mask_reg); 1957 mask = ioread32(regs->enpointa_mask_reg); 1958 mask &= ~(regs->int_dl_cpu2pciea | regs->int_comaout | 1959 regs->int_comaerr); 1960 iowrite32(mask, regs->enpointa_mask_reg); 1961 } 1962 1963 static int mvumi_clear_intr(void *extend) 1964 { 1965 struct mvumi_hba *mhba = (struct mvumi_hba *) extend; 1966 unsigned int status, isr_status = 0, tmp = 0; 1967 struct mvumi_hw_regs *regs = mhba->regs; 1968 1969 status = ioread32(regs->main_int_cause_reg); 1970 if (!(status & regs->int_mu) || status == 0xFFFFFFFF) 1971 return 1; 1972 if (unlikely(status & regs->int_comaerr)) { 1973 tmp = ioread32(regs->outb_isr_cause); 1974 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) { 1975 if (tmp & regs->clic_out_err) { 1976 iowrite32(tmp & regs->clic_out_err, 1977 regs->outb_isr_cause); 1978 } 1979 } else { 1980 if (tmp & (regs->clic_in_err | regs->clic_out_err)) 1981 iowrite32(tmp & (regs->clic_in_err | 1982 regs->clic_out_err), 1983 regs->outb_isr_cause); 1984 } 1985 status ^= mhba->regs->int_comaerr; 1986 /* inbound or outbound parity error, command will timeout */ 1987 } 1988 if (status & regs->int_comaout) { 1989 tmp = ioread32(regs->outb_isr_cause); 1990 if (tmp & regs->clic_irq) 1991 iowrite32(tmp & regs->clic_irq, regs->outb_isr_cause); 1992 } 1993 if (status & regs->int_dl_cpu2pciea) { 1994 isr_status = ioread32(regs->arm_to_pciea_drbl_reg); 1995 if (isr_status) 1996 iowrite32(isr_status, regs->arm_to_pciea_drbl_reg); 1997 } 1998 1999 mhba->global_isr = status; 2000 mhba->isr_status = isr_status; 2001 2002 return 0; 2003 } 2004 2005 /** 2006 * mvumi_read_fw_status_reg - returns the current FW status value 2007 * @mhba: Adapter soft state 2008 */ 2009 static unsigned int mvumi_read_fw_status_reg(struct mvumi_hba *mhba) 2010 { 2011 unsigned int status; 2012 2013 status = ioread32(mhba->regs->arm_to_pciea_drbl_reg); 2014 if (status) 2015 iowrite32(status, mhba->regs->arm_to_pciea_drbl_reg); 2016 return status; 2017 } 2018 2019 static struct mvumi_instance_template mvumi_instance_9143 = { 2020 .fire_cmd = mvumi_fire_cmd, 2021 .enable_intr = mvumi_enable_intr, 2022 .disable_intr = mvumi_disable_intr, 2023 .clear_intr = mvumi_clear_intr, 2024 .read_fw_status_reg = mvumi_read_fw_status_reg, 2025 .check_ib_list = mvumi_check_ib_list_9143, 2026 .check_ob_list = mvumi_check_ob_list_9143, 2027 .reset_host = mvumi_reset_host_9143, 2028 }; 2029 2030 static struct mvumi_instance_template mvumi_instance_9580 = { 2031 .fire_cmd = mvumi_fire_cmd, 2032 .enable_intr = mvumi_enable_intr, 2033 .disable_intr = mvumi_disable_intr, 2034 .clear_intr = mvumi_clear_intr, 2035 .read_fw_status_reg = mvumi_read_fw_status_reg, 2036 .check_ib_list = mvumi_check_ib_list_9580, 2037 .check_ob_list = mvumi_check_ob_list_9580, 2038 .reset_host = mvumi_reset_host_9580, 2039 }; 2040 2041 static int mvumi_slave_configure(struct scsi_device *sdev) 2042 { 2043 struct mvumi_hba *mhba; 2044 unsigned char bitcount = sizeof(unsigned char) * 8; 2045 2046 mhba = (struct mvumi_hba *) sdev->host->hostdata; 2047 if (sdev->id >= mhba->max_target_id) 2048 return -EINVAL; 2049 2050 mhba->target_map[sdev->id / bitcount] |= (1 << (sdev->id % bitcount)); 2051 return 0; 2052 } 2053 2054 /** 2055 * mvumi_build_frame - Prepares a direct cdb (DCDB) command 2056 * @mhba: Adapter soft state 2057 * @scmd: SCSI command 2058 * @cmd: Command to be prepared in 2059 * 2060 * This function prepares CDB commands. These are typcially pass-through 2061 * commands to the devices. 2062 */ 2063 static unsigned char mvumi_build_frame(struct mvumi_hba *mhba, 2064 struct scsi_cmnd *scmd, struct mvumi_cmd *cmd) 2065 { 2066 struct mvumi_msg_frame *pframe; 2067 2068 cmd->scmd = scmd; 2069 cmd->cmd_status = REQ_STATUS_PENDING; 2070 pframe = cmd->frame; 2071 pframe->device_id = ((unsigned short) scmd->device->id) | 2072 (((unsigned short) scmd->device->lun) << 8); 2073 pframe->cmd_flag = 0; 2074 2075 switch (scmd->sc_data_direction) { 2076 case DMA_NONE: 2077 pframe->cmd_flag |= CMD_FLAG_NON_DATA; 2078 break; 2079 case DMA_FROM_DEVICE: 2080 pframe->cmd_flag |= CMD_FLAG_DATA_IN; 2081 break; 2082 case DMA_TO_DEVICE: 2083 pframe->cmd_flag |= CMD_FLAG_DATA_OUT; 2084 break; 2085 case DMA_BIDIRECTIONAL: 2086 default: 2087 dev_warn(&mhba->pdev->dev, "unexpected data direction[%d] " 2088 "cmd[0x%x]\n", scmd->sc_data_direction, scmd->cmnd[0]); 2089 goto error; 2090 } 2091 2092 pframe->cdb_length = scmd->cmd_len; 2093 memcpy(pframe->cdb, scmd->cmnd, pframe->cdb_length); 2094 pframe->req_function = CL_FUN_SCSI_CMD; 2095 if (scsi_bufflen(scmd)) { 2096 if (mvumi_make_sgl(mhba, scmd, &pframe->payload[0], 2097 &pframe->sg_counts)) 2098 goto error; 2099 2100 pframe->data_transfer_length = scsi_bufflen(scmd); 2101 } else { 2102 pframe->sg_counts = 0; 2103 pframe->data_transfer_length = 0; 2104 } 2105 return 0; 2106 2107 error: 2108 scmd->result = (DID_OK << 16) | (DRIVER_SENSE << 24) | 2109 SAM_STAT_CHECK_CONDITION; 2110 scsi_build_sense_buffer(0, scmd->sense_buffer, ILLEGAL_REQUEST, 0x24, 2111 0); 2112 return -1; 2113 } 2114 2115 /** 2116 * mvumi_queue_command - Queue entry point 2117 * @scmd: SCSI command to be queued 2118 * @done: Callback entry point 2119 */ 2120 static int mvumi_queue_command(struct Scsi_Host *shost, 2121 struct scsi_cmnd *scmd) 2122 { 2123 struct mvumi_cmd *cmd; 2124 struct mvumi_hba *mhba; 2125 unsigned long irq_flags; 2126 2127 spin_lock_irqsave(shost->host_lock, irq_flags); 2128 scsi_cmd_get_serial(shost, scmd); 2129 2130 mhba = (struct mvumi_hba *) shost->hostdata; 2131 scmd->result = 0; 2132 cmd = mvumi_get_cmd(mhba); 2133 if (unlikely(!cmd)) { 2134 spin_unlock_irqrestore(shost->host_lock, irq_flags); 2135 return SCSI_MLQUEUE_HOST_BUSY; 2136 } 2137 2138 if (unlikely(mvumi_build_frame(mhba, scmd, cmd))) 2139 goto out_return_cmd; 2140 2141 cmd->scmd = scmd; 2142 scmd->SCp.ptr = (char *) cmd; 2143 mhba->instancet->fire_cmd(mhba, cmd); 2144 spin_unlock_irqrestore(shost->host_lock, irq_flags); 2145 return 0; 2146 2147 out_return_cmd: 2148 mvumi_return_cmd(mhba, cmd); 2149 scmd->scsi_done(scmd); 2150 spin_unlock_irqrestore(shost->host_lock, irq_flags); 2151 return 0; 2152 } 2153 2154 static enum blk_eh_timer_return mvumi_timed_out(struct scsi_cmnd *scmd) 2155 { 2156 struct mvumi_cmd *cmd = (struct mvumi_cmd *) scmd->SCp.ptr; 2157 struct Scsi_Host *host = scmd->device->host; 2158 struct mvumi_hba *mhba = shost_priv(host); 2159 unsigned long flags; 2160 2161 spin_lock_irqsave(mhba->shost->host_lock, flags); 2162 2163 if (mhba->tag_cmd[cmd->frame->tag]) { 2164 mhba->tag_cmd[cmd->frame->tag] = 0; 2165 tag_release_one(mhba, &mhba->tag_pool, cmd->frame->tag); 2166 } 2167 if (!list_empty(&cmd->queue_pointer)) 2168 list_del_init(&cmd->queue_pointer); 2169 else 2170 atomic_dec(&mhba->fw_outstanding); 2171 2172 scmd->result = (DRIVER_INVALID << 24) | (DID_ABORT << 16); 2173 scmd->SCp.ptr = NULL; 2174 if (scsi_bufflen(scmd)) { 2175 if (scsi_sg_count(scmd)) { 2176 pci_unmap_sg(mhba->pdev, 2177 scsi_sglist(scmd), 2178 scsi_sg_count(scmd), 2179 (int)scmd->sc_data_direction); 2180 } else { 2181 pci_unmap_single(mhba->pdev, 2182 scmd->SCp.dma_handle, 2183 scsi_bufflen(scmd), 2184 (int)scmd->sc_data_direction); 2185 2186 scmd->SCp.dma_handle = 0; 2187 } 2188 } 2189 mvumi_return_cmd(mhba, cmd); 2190 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 2191 2192 return BLK_EH_NOT_HANDLED; 2193 } 2194 2195 static int 2196 mvumi_bios_param(struct scsi_device *sdev, struct block_device *bdev, 2197 sector_t capacity, int geom[]) 2198 { 2199 int heads, sectors; 2200 sector_t cylinders; 2201 unsigned long tmp; 2202 2203 heads = 64; 2204 sectors = 32; 2205 tmp = heads * sectors; 2206 cylinders = capacity; 2207 sector_div(cylinders, tmp); 2208 2209 if (capacity >= 0x200000) { 2210 heads = 255; 2211 sectors = 63; 2212 tmp = heads * sectors; 2213 cylinders = capacity; 2214 sector_div(cylinders, tmp); 2215 } 2216 geom[0] = heads; 2217 geom[1] = sectors; 2218 geom[2] = cylinders; 2219 2220 return 0; 2221 } 2222 2223 static struct scsi_host_template mvumi_template = { 2224 2225 .module = THIS_MODULE, 2226 .name = "Marvell Storage Controller", 2227 .slave_configure = mvumi_slave_configure, 2228 .queuecommand = mvumi_queue_command, 2229 .eh_timed_out = mvumi_timed_out, 2230 .eh_host_reset_handler = mvumi_host_reset, 2231 .bios_param = mvumi_bios_param, 2232 .this_id = -1, 2233 }; 2234 2235 static int mvumi_cfg_hw_reg(struct mvumi_hba *mhba) 2236 { 2237 void *base = NULL; 2238 struct mvumi_hw_regs *regs; 2239 2240 switch (mhba->pdev->device) { 2241 case PCI_DEVICE_ID_MARVELL_MV9143: 2242 mhba->mmio = mhba->base_addr[0]; 2243 base = mhba->mmio; 2244 if (!mhba->regs) { 2245 mhba->regs = kzalloc(sizeof(*regs), GFP_KERNEL); 2246 if (mhba->regs == NULL) 2247 return -ENOMEM; 2248 } 2249 regs = mhba->regs; 2250 2251 /* For Arm */ 2252 regs->ctrl_sts_reg = base + 0x20104; 2253 regs->rstoutn_mask_reg = base + 0x20108; 2254 regs->sys_soft_rst_reg = base + 0x2010C; 2255 regs->main_int_cause_reg = base + 0x20200; 2256 regs->enpointa_mask_reg = base + 0x2020C; 2257 regs->rstoutn_en_reg = base + 0xF1400; 2258 /* For Doorbell */ 2259 regs->pciea_to_arm_drbl_reg = base + 0x20400; 2260 regs->arm_to_pciea_drbl_reg = base + 0x20408; 2261 regs->arm_to_pciea_mask_reg = base + 0x2040C; 2262 regs->pciea_to_arm_msg0 = base + 0x20430; 2263 regs->pciea_to_arm_msg1 = base + 0x20434; 2264 regs->arm_to_pciea_msg0 = base + 0x20438; 2265 regs->arm_to_pciea_msg1 = base + 0x2043C; 2266 2267 /* For Message Unit */ 2268 2269 regs->inb_aval_count_basel = base + 0x508; 2270 regs->inb_aval_count_baseh = base + 0x50C; 2271 regs->inb_write_pointer = base + 0x518; 2272 regs->inb_read_pointer = base + 0x51C; 2273 regs->outb_coal_cfg = base + 0x568; 2274 regs->outb_copy_basel = base + 0x5B0; 2275 regs->outb_copy_baseh = base + 0x5B4; 2276 regs->outb_copy_pointer = base + 0x544; 2277 regs->outb_read_pointer = base + 0x548; 2278 regs->outb_isr_cause = base + 0x560; 2279 regs->outb_coal_cfg = base + 0x568; 2280 /* Bit setting for HW */ 2281 regs->int_comaout = 1 << 8; 2282 regs->int_comaerr = 1 << 6; 2283 regs->int_dl_cpu2pciea = 1 << 1; 2284 regs->cl_pointer_toggle = 1 << 12; 2285 regs->clic_irq = 1 << 1; 2286 regs->clic_in_err = 1 << 8; 2287 regs->clic_out_err = 1 << 12; 2288 regs->cl_slot_num_mask = 0xFFF; 2289 regs->int_drbl_int_mask = 0x3FFFFFFF; 2290 regs->int_mu = regs->int_dl_cpu2pciea | regs->int_comaout | 2291 regs->int_comaerr; 2292 break; 2293 case PCI_DEVICE_ID_MARVELL_MV9580: 2294 mhba->mmio = mhba->base_addr[2]; 2295 base = mhba->mmio; 2296 if (!mhba->regs) { 2297 mhba->regs = kzalloc(sizeof(*regs), GFP_KERNEL); 2298 if (mhba->regs == NULL) 2299 return -ENOMEM; 2300 } 2301 regs = mhba->regs; 2302 /* For Arm */ 2303 regs->ctrl_sts_reg = base + 0x20104; 2304 regs->rstoutn_mask_reg = base + 0x1010C; 2305 regs->sys_soft_rst_reg = base + 0x10108; 2306 regs->main_int_cause_reg = base + 0x10200; 2307 regs->enpointa_mask_reg = base + 0x1020C; 2308 regs->rstoutn_en_reg = base + 0xF1400; 2309 2310 /* For Doorbell */ 2311 regs->pciea_to_arm_drbl_reg = base + 0x10460; 2312 regs->arm_to_pciea_drbl_reg = base + 0x10480; 2313 regs->arm_to_pciea_mask_reg = base + 0x10484; 2314 regs->pciea_to_arm_msg0 = base + 0x10400; 2315 regs->pciea_to_arm_msg1 = base + 0x10404; 2316 regs->arm_to_pciea_msg0 = base + 0x10420; 2317 regs->arm_to_pciea_msg1 = base + 0x10424; 2318 2319 /* For reset*/ 2320 regs->reset_request = base + 0x10108; 2321 regs->reset_enable = base + 0x1010c; 2322 2323 /* For Message Unit */ 2324 regs->inb_aval_count_basel = base + 0x4008; 2325 regs->inb_aval_count_baseh = base + 0x400C; 2326 regs->inb_write_pointer = base + 0x4018; 2327 regs->inb_read_pointer = base + 0x401C; 2328 regs->outb_copy_basel = base + 0x4058; 2329 regs->outb_copy_baseh = base + 0x405C; 2330 regs->outb_copy_pointer = base + 0x406C; 2331 regs->outb_read_pointer = base + 0x4070; 2332 regs->outb_coal_cfg = base + 0x4080; 2333 regs->outb_isr_cause = base + 0x4088; 2334 /* Bit setting for HW */ 2335 regs->int_comaout = 1 << 4; 2336 regs->int_dl_cpu2pciea = 1 << 12; 2337 regs->int_comaerr = 1 << 29; 2338 regs->cl_pointer_toggle = 1 << 14; 2339 regs->cl_slot_num_mask = 0x3FFF; 2340 regs->clic_irq = 1 << 0; 2341 regs->clic_out_err = 1 << 1; 2342 regs->int_drbl_int_mask = 0x3FFFFFFF; 2343 regs->int_mu = regs->int_dl_cpu2pciea | regs->int_comaout; 2344 break; 2345 default: 2346 return -1; 2347 break; 2348 } 2349 2350 return 0; 2351 } 2352 2353 /** 2354 * mvumi_init_fw - Initializes the FW 2355 * @mhba: Adapter soft state 2356 * 2357 * This is the main function for initializing firmware. 2358 */ 2359 static int mvumi_init_fw(struct mvumi_hba *mhba) 2360 { 2361 int ret = 0; 2362 2363 if (pci_request_regions(mhba->pdev, MV_DRIVER_NAME)) { 2364 dev_err(&mhba->pdev->dev, "IO memory region busy!\n"); 2365 return -EBUSY; 2366 } 2367 ret = mvumi_map_pci_addr(mhba->pdev, mhba->base_addr); 2368 if (ret) 2369 goto fail_ioremap; 2370 2371 switch (mhba->pdev->device) { 2372 case PCI_DEVICE_ID_MARVELL_MV9143: 2373 mhba->instancet = &mvumi_instance_9143; 2374 mhba->io_seq = 0; 2375 mhba->max_sge = MVUMI_MAX_SG_ENTRY; 2376 mhba->request_id_enabled = 1; 2377 break; 2378 case PCI_DEVICE_ID_MARVELL_MV9580: 2379 mhba->instancet = &mvumi_instance_9580; 2380 mhba->io_seq = 0; 2381 mhba->max_sge = MVUMI_MAX_SG_ENTRY; 2382 break; 2383 default: 2384 dev_err(&mhba->pdev->dev, "device 0x%x not supported!\n", 2385 mhba->pdev->device); 2386 mhba->instancet = NULL; 2387 ret = -EINVAL; 2388 goto fail_alloc_mem; 2389 } 2390 dev_dbg(&mhba->pdev->dev, "device id : %04X is found.\n", 2391 mhba->pdev->device); 2392 ret = mvumi_cfg_hw_reg(mhba); 2393 if (ret) { 2394 dev_err(&mhba->pdev->dev, 2395 "failed to allocate memory for reg\n"); 2396 ret = -ENOMEM; 2397 goto fail_alloc_mem; 2398 } 2399 mhba->handshake_page = pci_alloc_consistent(mhba->pdev, HSP_MAX_SIZE, 2400 &mhba->handshake_page_phys); 2401 if (!mhba->handshake_page) { 2402 dev_err(&mhba->pdev->dev, 2403 "failed to allocate memory for handshake\n"); 2404 ret = -ENOMEM; 2405 goto fail_alloc_page; 2406 } 2407 2408 if (mvumi_start(mhba)) { 2409 ret = -EINVAL; 2410 goto fail_ready_state; 2411 } 2412 ret = mvumi_alloc_cmds(mhba); 2413 if (ret) 2414 goto fail_ready_state; 2415 2416 return 0; 2417 2418 fail_ready_state: 2419 mvumi_release_mem_resource(mhba); 2420 pci_free_consistent(mhba->pdev, HSP_MAX_SIZE, 2421 mhba->handshake_page, mhba->handshake_page_phys); 2422 fail_alloc_page: 2423 kfree(mhba->regs); 2424 fail_alloc_mem: 2425 mvumi_unmap_pci_addr(mhba->pdev, mhba->base_addr); 2426 fail_ioremap: 2427 pci_release_regions(mhba->pdev); 2428 2429 return ret; 2430 } 2431 2432 /** 2433 * mvumi_io_attach - Attaches this driver to SCSI mid-layer 2434 * @mhba: Adapter soft state 2435 */ 2436 static int mvumi_io_attach(struct mvumi_hba *mhba) 2437 { 2438 struct Scsi_Host *host = mhba->shost; 2439 struct scsi_device *sdev = NULL; 2440 int ret; 2441 unsigned int max_sg = (mhba->ib_max_size + 4 - 2442 sizeof(struct mvumi_msg_frame)) / sizeof(struct mvumi_sgl); 2443 2444 host->irq = mhba->pdev->irq; 2445 host->unique_id = mhba->unique_id; 2446 host->can_queue = (mhba->max_io - 1) ? (mhba->max_io - 1) : 1; 2447 host->sg_tablesize = mhba->max_sge > max_sg ? max_sg : mhba->max_sge; 2448 host->max_sectors = mhba->max_transfer_size / 512; 2449 host->cmd_per_lun = (mhba->max_io - 1) ? (mhba->max_io - 1) : 1; 2450 host->max_id = mhba->max_target_id; 2451 host->max_cmd_len = MAX_COMMAND_SIZE; 2452 2453 ret = scsi_add_host(host, &mhba->pdev->dev); 2454 if (ret) { 2455 dev_err(&mhba->pdev->dev, "scsi_add_host failed\n"); 2456 return ret; 2457 } 2458 mhba->fw_flag |= MVUMI_FW_ATTACH; 2459 2460 mutex_lock(&mhba->sas_discovery_mutex); 2461 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) 2462 ret = scsi_add_device(host, 0, mhba->max_target_id - 1, 0); 2463 else 2464 ret = 0; 2465 if (ret) { 2466 dev_err(&mhba->pdev->dev, "add virtual device failed\n"); 2467 mutex_unlock(&mhba->sas_discovery_mutex); 2468 goto fail_add_device; 2469 } 2470 2471 mhba->dm_thread = kthread_create(mvumi_rescan_bus, 2472 mhba, "mvumi_scanthread"); 2473 if (IS_ERR(mhba->dm_thread)) { 2474 dev_err(&mhba->pdev->dev, 2475 "failed to create device scan thread\n"); 2476 mutex_unlock(&mhba->sas_discovery_mutex); 2477 goto fail_create_thread; 2478 } 2479 atomic_set(&mhba->pnp_count, 1); 2480 wake_up_process(mhba->dm_thread); 2481 2482 mutex_unlock(&mhba->sas_discovery_mutex); 2483 return 0; 2484 2485 fail_create_thread: 2486 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) 2487 sdev = scsi_device_lookup(mhba->shost, 0, 2488 mhba->max_target_id - 1, 0); 2489 if (sdev) { 2490 scsi_remove_device(sdev); 2491 scsi_device_put(sdev); 2492 } 2493 fail_add_device: 2494 scsi_remove_host(mhba->shost); 2495 return ret; 2496 } 2497 2498 /** 2499 * mvumi_probe_one - PCI hotplug entry point 2500 * @pdev: PCI device structure 2501 * @id: PCI ids of supported hotplugged adapter 2502 */ 2503 static int mvumi_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) 2504 { 2505 struct Scsi_Host *host; 2506 struct mvumi_hba *mhba; 2507 int ret; 2508 2509 dev_dbg(&pdev->dev, " %#4.04x:%#4.04x:%#4.04x:%#4.04x: ", 2510 pdev->vendor, pdev->device, pdev->subsystem_vendor, 2511 pdev->subsystem_device); 2512 2513 ret = pci_enable_device(pdev); 2514 if (ret) 2515 return ret; 2516 2517 pci_set_master(pdev); 2518 2519 if (IS_DMA64) { 2520 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2521 if (ret) { 2522 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2523 if (ret) 2524 goto fail_set_dma_mask; 2525 } 2526 } else { 2527 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2528 if (ret) 2529 goto fail_set_dma_mask; 2530 } 2531 2532 host = scsi_host_alloc(&mvumi_template, sizeof(*mhba)); 2533 if (!host) { 2534 dev_err(&pdev->dev, "scsi_host_alloc failed\n"); 2535 ret = -ENOMEM; 2536 goto fail_alloc_instance; 2537 } 2538 mhba = shost_priv(host); 2539 2540 INIT_LIST_HEAD(&mhba->cmd_pool); 2541 INIT_LIST_HEAD(&mhba->ob_data_list); 2542 INIT_LIST_HEAD(&mhba->free_ob_list); 2543 INIT_LIST_HEAD(&mhba->res_list); 2544 INIT_LIST_HEAD(&mhba->waiting_req_list); 2545 mutex_init(&mhba->device_lock); 2546 INIT_LIST_HEAD(&mhba->mhba_dev_list); 2547 INIT_LIST_HEAD(&mhba->shost_dev_list); 2548 atomic_set(&mhba->fw_outstanding, 0); 2549 init_waitqueue_head(&mhba->int_cmd_wait_q); 2550 mutex_init(&mhba->sas_discovery_mutex); 2551 2552 mhba->pdev = pdev; 2553 mhba->shost = host; 2554 mhba->unique_id = pdev->bus->number << 8 | pdev->devfn; 2555 2556 ret = mvumi_init_fw(mhba); 2557 if (ret) 2558 goto fail_init_fw; 2559 2560 ret = request_irq(mhba->pdev->irq, mvumi_isr_handler, IRQF_SHARED, 2561 "mvumi", mhba); 2562 if (ret) { 2563 dev_err(&pdev->dev, "failed to register IRQ\n"); 2564 goto fail_init_irq; 2565 } 2566 2567 mhba->instancet->enable_intr(mhba); 2568 pci_set_drvdata(pdev, mhba); 2569 2570 ret = mvumi_io_attach(mhba); 2571 if (ret) 2572 goto fail_io_attach; 2573 2574 mvumi_backup_bar_addr(mhba); 2575 dev_dbg(&pdev->dev, "probe mvumi driver successfully.\n"); 2576 2577 return 0; 2578 2579 fail_io_attach: 2580 mhba->instancet->disable_intr(mhba); 2581 free_irq(mhba->pdev->irq, mhba); 2582 fail_init_irq: 2583 mvumi_release_fw(mhba); 2584 fail_init_fw: 2585 scsi_host_put(host); 2586 2587 fail_alloc_instance: 2588 fail_set_dma_mask: 2589 pci_disable_device(pdev); 2590 2591 return ret; 2592 } 2593 2594 static void mvumi_detach_one(struct pci_dev *pdev) 2595 { 2596 struct Scsi_Host *host; 2597 struct mvumi_hba *mhba; 2598 2599 mhba = pci_get_drvdata(pdev); 2600 if (mhba->dm_thread) { 2601 kthread_stop(mhba->dm_thread); 2602 mhba->dm_thread = NULL; 2603 } 2604 2605 mvumi_detach_devices(mhba); 2606 host = mhba->shost; 2607 scsi_remove_host(mhba->shost); 2608 mvumi_flush_cache(mhba); 2609 2610 mhba->instancet->disable_intr(mhba); 2611 free_irq(mhba->pdev->irq, mhba); 2612 mvumi_release_fw(mhba); 2613 scsi_host_put(host); 2614 pci_disable_device(pdev); 2615 dev_dbg(&pdev->dev, "driver is removed!\n"); 2616 } 2617 2618 /** 2619 * mvumi_shutdown - Shutdown entry point 2620 * @device: Generic device structure 2621 */ 2622 static void mvumi_shutdown(struct pci_dev *pdev) 2623 { 2624 struct mvumi_hba *mhba = pci_get_drvdata(pdev); 2625 2626 mvumi_flush_cache(mhba); 2627 } 2628 2629 static int __maybe_unused mvumi_suspend(struct pci_dev *pdev, pm_message_t state) 2630 { 2631 struct mvumi_hba *mhba = NULL; 2632 2633 mhba = pci_get_drvdata(pdev); 2634 mvumi_flush_cache(mhba); 2635 2636 pci_set_drvdata(pdev, mhba); 2637 mhba->instancet->disable_intr(mhba); 2638 free_irq(mhba->pdev->irq, mhba); 2639 mvumi_unmap_pci_addr(pdev, mhba->base_addr); 2640 pci_release_regions(pdev); 2641 pci_save_state(pdev); 2642 pci_disable_device(pdev); 2643 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 2644 2645 return 0; 2646 } 2647 2648 static int __maybe_unused mvumi_resume(struct pci_dev *pdev) 2649 { 2650 int ret; 2651 struct mvumi_hba *mhba = NULL; 2652 2653 mhba = pci_get_drvdata(pdev); 2654 2655 pci_set_power_state(pdev, PCI_D0); 2656 pci_enable_wake(pdev, PCI_D0, 0); 2657 pci_restore_state(pdev); 2658 2659 ret = pci_enable_device(pdev); 2660 if (ret) { 2661 dev_err(&pdev->dev, "enable device failed\n"); 2662 return ret; 2663 } 2664 pci_set_master(pdev); 2665 if (IS_DMA64) { 2666 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2667 if (ret) { 2668 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2669 if (ret) 2670 goto fail; 2671 } 2672 } else { 2673 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2674 if (ret) 2675 goto fail; 2676 } 2677 ret = pci_request_regions(mhba->pdev, MV_DRIVER_NAME); 2678 if (ret) 2679 goto fail; 2680 ret = mvumi_map_pci_addr(mhba->pdev, mhba->base_addr); 2681 if (ret) 2682 goto release_regions; 2683 2684 if (mvumi_cfg_hw_reg(mhba)) { 2685 ret = -EINVAL; 2686 goto unmap_pci_addr; 2687 } 2688 2689 mhba->mmio = mhba->base_addr[0]; 2690 mvumi_reset(mhba); 2691 2692 if (mvumi_start(mhba)) { 2693 ret = -EINVAL; 2694 goto unmap_pci_addr; 2695 } 2696 2697 ret = request_irq(mhba->pdev->irq, mvumi_isr_handler, IRQF_SHARED, 2698 "mvumi", mhba); 2699 if (ret) { 2700 dev_err(&pdev->dev, "failed to register IRQ\n"); 2701 goto unmap_pci_addr; 2702 } 2703 mhba->instancet->enable_intr(mhba); 2704 2705 return 0; 2706 2707 unmap_pci_addr: 2708 mvumi_unmap_pci_addr(pdev, mhba->base_addr); 2709 release_regions: 2710 pci_release_regions(pdev); 2711 fail: 2712 pci_disable_device(pdev); 2713 2714 return ret; 2715 } 2716 2717 static struct pci_driver mvumi_pci_driver = { 2718 2719 .name = MV_DRIVER_NAME, 2720 .id_table = mvumi_pci_table, 2721 .probe = mvumi_probe_one, 2722 .remove = mvumi_detach_one, 2723 .shutdown = mvumi_shutdown, 2724 #ifdef CONFIG_PM 2725 .suspend = mvumi_suspend, 2726 .resume = mvumi_resume, 2727 #endif 2728 }; 2729 2730 /** 2731 * mvumi_init - Driver load entry point 2732 */ 2733 static int __init mvumi_init(void) 2734 { 2735 return pci_register_driver(&mvumi_pci_driver); 2736 } 2737 2738 /** 2739 * mvumi_exit - Driver unload entry point 2740 */ 2741 static void __exit mvumi_exit(void) 2742 { 2743 2744 pci_unregister_driver(&mvumi_pci_driver); 2745 } 2746 2747 module_init(mvumi_init); 2748 module_exit(mvumi_exit); 2749 2750 2751 2752 2753 2754 /* LDV_COMMENT_BEGIN_MAIN */ 2755 #ifdef LDV_MAIN0_sequence_infinite_withcheck_stateful 2756 2757 /*###########################################################################*/ 2758 2759 /*############## Driver Environment Generator 0.2 output ####################*/ 2760 2761 /*###########################################################################*/ 2762 2763 2764 2765 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Test if all kernel resources are correctly released by driver before driver will be unloaded. */ 2766 void ldv_check_final_state(void); 2767 2768 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Test correct return result. */ 2769 void ldv_check_return_value(int res); 2770 2771 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Test correct return result of probe() function. */ 2772 void ldv_check_return_value_probe(int res); 2773 2774 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Initializes the model. */ 2775 void ldv_initialize(void); 2776 2777 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Reinitializes the model between distinct model function calls. */ 2778 void ldv_handler_precall(void); 2779 2780 /* LDV_COMMENT_FUNCTION_DECLARE_LDV Special function for LDV verifier. Returns arbitrary interger value. */ 2781 int nondet_int(void); 2782 2783 /* LDV_COMMENT_VAR_DECLARE_LDV Special variable for LDV verifier. */ 2784 int LDV_IN_INTERRUPT; 2785 2786 /* LDV_COMMENT_FUNCTION_MAIN Main function for LDV verifier. */ 2787 void ldv_main0_sequence_infinite_withcheck_stateful(void) { 2788 2789 2790 2791 /* LDV_COMMENT_BEGIN_VARIABLE_DECLARATION_PART */ 2792 /*============================= VARIABLE DECLARATION PART =============================*/ 2793 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 2794 /* content: static void mvumi_fire_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd)*/ 2795 /* LDV_COMMENT_END_PREP */ 2796 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_fire_cmd" */ 2797 struct mvumi_hba * var_group1; 2798 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_fire_cmd" */ 2799 struct mvumi_cmd * var_group2; 2800 /* LDV_COMMENT_BEGIN_PREP */ 2801 #ifdef CONFIG_PM 2802 #endif 2803 /* LDV_COMMENT_END_PREP */ 2804 /* content: static void mvumi_enable_intr(struct mvumi_hba *mhba)*/ 2805 /* LDV_COMMENT_END_PREP */ 2806 /* LDV_COMMENT_BEGIN_PREP */ 2807 #ifdef CONFIG_PM 2808 #endif 2809 /* LDV_COMMENT_END_PREP */ 2810 /* content: static void mvumi_disable_intr(struct mvumi_hba *mhba)*/ 2811 /* LDV_COMMENT_END_PREP */ 2812 /* LDV_COMMENT_BEGIN_PREP */ 2813 #ifdef CONFIG_PM 2814 #endif 2815 /* LDV_COMMENT_END_PREP */ 2816 /* content: static int mvumi_clear_intr(void *extend)*/ 2817 /* LDV_COMMENT_END_PREP */ 2818 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_clear_intr" */ 2819 void * var_mvumi_clear_intr_66_p0; 2820 /* LDV_COMMENT_BEGIN_PREP */ 2821 #ifdef CONFIG_PM 2822 #endif 2823 /* LDV_COMMENT_END_PREP */ 2824 /* content: static unsigned int mvumi_read_fw_status_reg(struct mvumi_hba *mhba)*/ 2825 /* LDV_COMMENT_END_PREP */ 2826 /* LDV_COMMENT_BEGIN_PREP */ 2827 #ifdef CONFIG_PM 2828 #endif 2829 /* LDV_COMMENT_END_PREP */ 2830 /* content: static unsigned int mvumi_check_ib_list_9143(struct mvumi_hba *mhba)*/ 2831 /* LDV_COMMENT_END_PREP */ 2832 /* LDV_COMMENT_BEGIN_PREP */ 2833 #ifdef CONFIG_PM 2834 #endif 2835 /* LDV_COMMENT_END_PREP */ 2836 /* content: static int mvumi_check_ob_list_9143(struct mvumi_hba *mhba, unsigned int *cur_obf, unsigned int *assign_obf_end)*/ 2837 /* LDV_COMMENT_END_PREP */ 2838 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_check_ob_list_9143" */ 2839 unsigned int * var_mvumi_check_ob_list_9143_21_p1; 2840 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_check_ob_list_9143" */ 2841 unsigned int * var_mvumi_check_ob_list_9143_21_p2; 2842 /* LDV_COMMENT_BEGIN_PREP */ 2843 #ifdef CONFIG_PM 2844 #endif 2845 /* LDV_COMMENT_END_PREP */ 2846 /* content: static int mvumi_reset_host_9143(struct mvumi_hba *mhba)*/ 2847 /* LDV_COMMENT_END_PREP */ 2848 /* LDV_COMMENT_BEGIN_PREP */ 2849 #ifdef CONFIG_PM 2850 #endif 2851 /* LDV_COMMENT_END_PREP */ 2852 2853 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 2854 /* content: static void mvumi_fire_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd)*/ 2855 /* LDV_COMMENT_END_PREP */ 2856 /* LDV_COMMENT_BEGIN_PREP */ 2857 #ifdef CONFIG_PM 2858 #endif 2859 /* LDV_COMMENT_END_PREP */ 2860 /* content: static void mvumi_enable_intr(struct mvumi_hba *mhba)*/ 2861 /* LDV_COMMENT_END_PREP */ 2862 /* LDV_COMMENT_BEGIN_PREP */ 2863 #ifdef CONFIG_PM 2864 #endif 2865 /* LDV_COMMENT_END_PREP */ 2866 /* content: static void mvumi_disable_intr(struct mvumi_hba *mhba)*/ 2867 /* LDV_COMMENT_END_PREP */ 2868 /* LDV_COMMENT_BEGIN_PREP */ 2869 #ifdef CONFIG_PM 2870 #endif 2871 /* LDV_COMMENT_END_PREP */ 2872 /* content: static int mvumi_clear_intr(void *extend)*/ 2873 /* LDV_COMMENT_END_PREP */ 2874 /* LDV_COMMENT_BEGIN_PREP */ 2875 #ifdef CONFIG_PM 2876 #endif 2877 /* LDV_COMMENT_END_PREP */ 2878 /* content: static unsigned int mvumi_read_fw_status_reg(struct mvumi_hba *mhba)*/ 2879 /* LDV_COMMENT_END_PREP */ 2880 /* LDV_COMMENT_BEGIN_PREP */ 2881 #ifdef CONFIG_PM 2882 #endif 2883 /* LDV_COMMENT_END_PREP */ 2884 /* content: static unsigned int mvumi_check_ib_list_9580(struct mvumi_hba *mhba)*/ 2885 /* LDV_COMMENT_END_PREP */ 2886 /* LDV_COMMENT_BEGIN_PREP */ 2887 #ifdef CONFIG_PM 2888 #endif 2889 /* LDV_COMMENT_END_PREP */ 2890 /* content: static int mvumi_check_ob_list_9580(struct mvumi_hba *mhba, unsigned int *cur_obf, unsigned int *assign_obf_end)*/ 2891 /* LDV_COMMENT_END_PREP */ 2892 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_check_ob_list_9580" */ 2893 unsigned int * var_mvumi_check_ob_list_9580_22_p1; 2894 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_check_ob_list_9580" */ 2895 unsigned int * var_mvumi_check_ob_list_9580_22_p2; 2896 /* LDV_COMMENT_BEGIN_PREP */ 2897 #ifdef CONFIG_PM 2898 #endif 2899 /* LDV_COMMENT_END_PREP */ 2900 /* content: static int mvumi_reset_host_9580(struct mvumi_hba *mhba)*/ 2901 /* LDV_COMMENT_END_PREP */ 2902 /* LDV_COMMENT_BEGIN_PREP */ 2903 #ifdef CONFIG_PM 2904 #endif 2905 /* LDV_COMMENT_END_PREP */ 2906 2907 /** STRUCT: struct type: scsi_host_template, struct name: mvumi_template **/ 2908 /* content: static int mvumi_slave_configure(struct scsi_device *sdev)*/ 2909 /* LDV_COMMENT_END_PREP */ 2910 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_slave_configure" */ 2911 struct scsi_device * var_group3; 2912 /* LDV_COMMENT_BEGIN_PREP */ 2913 #ifdef CONFIG_PM 2914 #endif 2915 /* LDV_COMMENT_END_PREP */ 2916 /* content: static int mvumi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)*/ 2917 /* LDV_COMMENT_END_PREP */ 2918 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_queue_command" */ 2919 struct Scsi_Host * var_group4; 2920 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_queue_command" */ 2921 struct scsi_cmnd * var_group5; 2922 /* LDV_COMMENT_BEGIN_PREP */ 2923 #ifdef CONFIG_PM 2924 #endif 2925 /* LDV_COMMENT_END_PREP */ 2926 /* content: static enum blk_eh_timer_return mvumi_timed_out(struct scsi_cmnd *scmd)*/ 2927 /* LDV_COMMENT_END_PREP */ 2928 /* LDV_COMMENT_BEGIN_PREP */ 2929 #ifdef CONFIG_PM 2930 #endif 2931 /* LDV_COMMENT_END_PREP */ 2932 /* content: static int mvumi_host_reset(struct scsi_cmnd *scmd)*/ 2933 /* LDV_COMMENT_END_PREP */ 2934 /* LDV_COMMENT_BEGIN_PREP */ 2935 #ifdef CONFIG_PM 2936 #endif 2937 /* LDV_COMMENT_END_PREP */ 2938 2939 /** STRUCT: struct type: pci_driver, struct name: mvumi_pci_driver **/ 2940 /* content: static int mvumi_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)*/ 2941 /* LDV_COMMENT_END_PREP */ 2942 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_probe_one" */ 2943 struct pci_dev * var_group6; 2944 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_probe_one" */ 2945 const struct pci_device_id * var_mvumi_probe_one_75_p1; 2946 /* LDV_COMMENT_VAR_DECLARE Variable declaration for test return result from function call "mvumi_probe_one" */ 2947 static int res_mvumi_probe_one_75; 2948 /* LDV_COMMENT_BEGIN_PREP */ 2949 #ifdef CONFIG_PM 2950 #endif 2951 /* LDV_COMMENT_END_PREP */ 2952 /* content: static void mvumi_detach_one(struct pci_dev *pdev)*/ 2953 /* LDV_COMMENT_END_PREP */ 2954 /* LDV_COMMENT_BEGIN_PREP */ 2955 #ifdef CONFIG_PM 2956 #endif 2957 /* LDV_COMMENT_END_PREP */ 2958 /* content: static void mvumi_shutdown(struct pci_dev *pdev)*/ 2959 /* LDV_COMMENT_END_PREP */ 2960 /* LDV_COMMENT_BEGIN_PREP */ 2961 #ifdef CONFIG_PM 2962 #endif 2963 /* LDV_COMMENT_END_PREP */ 2964 /* content: static int __maybe_unused mvumi_suspend(struct pci_dev *pdev, pm_message_t state)*/ 2965 /* LDV_COMMENT_END_PREP */ 2966 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_suspend" */ 2967 pm_message_t var_mvumi_suspend_78_p1; 2968 /* LDV_COMMENT_BEGIN_PREP */ 2969 #ifdef CONFIG_PM 2970 #endif 2971 /* LDV_COMMENT_END_PREP */ 2972 /* content: static int __maybe_unused mvumi_resume(struct pci_dev *pdev)*/ 2973 /* LDV_COMMENT_END_PREP */ 2974 /* LDV_COMMENT_BEGIN_PREP */ 2975 #ifdef CONFIG_PM 2976 #endif 2977 /* LDV_COMMENT_END_PREP */ 2978 2979 /** CALLBACK SECTION request_irq **/ 2980 /* content: static irqreturn_t mvumi_isr_handler(int irq, void *devp)*/ 2981 /* LDV_COMMENT_END_PREP */ 2982 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_isr_handler" */ 2983 int var_mvumi_isr_handler_61_p0; 2984 /* LDV_COMMENT_VAR_DECLARE Variable declaration for function "mvumi_isr_handler" */ 2985 void * var_mvumi_isr_handler_61_p1; 2986 /* LDV_COMMENT_BEGIN_PREP */ 2987 #ifdef CONFIG_PM 2988 #endif 2989 /* LDV_COMMENT_END_PREP */ 2990 2991 2992 2993 2994 /* LDV_COMMENT_END_VARIABLE_DECLARATION_PART */ 2995 /* LDV_COMMENT_BEGIN_VARIABLE_INITIALIZING_PART */ 2996 /*============================= VARIABLE INITIALIZING PART =============================*/ 2997 LDV_IN_INTERRUPT=1; 2998 2999 3000 3001 3002 /* LDV_COMMENT_END_VARIABLE_INITIALIZING_PART */ 3003 /* LDV_COMMENT_BEGIN_FUNCTION_CALL_SECTION */ 3004 /*============================= FUNCTION CALL SECTION =============================*/ 3005 /* LDV_COMMENT_FUNCTION_CALL Initialize LDV model. */ 3006 ldv_initialize(); 3007 3008 /** INIT: init_type: ST_MODULE_INIT **/ 3009 /* content: static int __init mvumi_init(void)*/ 3010 /* LDV_COMMENT_BEGIN_PREP */ 3011 #ifdef CONFIG_PM 3012 #endif 3013 /* LDV_COMMENT_END_PREP */ 3014 /* LDV_COMMENT_FUNCTION_CALL Kernel calls driver init function after driver loading to kernel. This function declared as "MODULE_INIT(function name)". */ 3015 ldv_handler_precall(); 3016 if(mvumi_init()) 3017 goto ldv_final; 3018 3019 3020 3021 3022 3023 3024 int ldv_s_mvumi_pci_driver_pci_driver = 0; 3025 3026 3027 3028 3029 3030 while( nondet_int() 3031 || !(ldv_s_mvumi_pci_driver_pci_driver == 0) 3032 ) { 3033 3034 switch(nondet_int()) { 3035 3036 case 0: { 3037 3038 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3039 3040 3041 /* content: static void mvumi_fire_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd)*/ 3042 /* LDV_COMMENT_END_PREP */ 3043 /* LDV_COMMENT_FUNCTION_CALL Function from field "fire_cmd" from driver structure with callbacks "mvumi_instance_9143" */ 3044 ldv_handler_precall(); 3045 mvumi_fire_cmd( var_group1, var_group2); 3046 /* LDV_COMMENT_BEGIN_PREP */ 3047 #ifdef CONFIG_PM 3048 #endif 3049 /* LDV_COMMENT_END_PREP */ 3050 3051 3052 3053 3054 } 3055 3056 break; 3057 case 1: { 3058 3059 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3060 3061 3062 /* content: static void mvumi_enable_intr(struct mvumi_hba *mhba)*/ 3063 /* LDV_COMMENT_END_PREP */ 3064 /* LDV_COMMENT_FUNCTION_CALL Function from field "enable_intr" from driver structure with callbacks "mvumi_instance_9143" */ 3065 ldv_handler_precall(); 3066 mvumi_enable_intr( var_group1); 3067 /* LDV_COMMENT_BEGIN_PREP */ 3068 #ifdef CONFIG_PM 3069 #endif 3070 /* LDV_COMMENT_END_PREP */ 3071 3072 3073 3074 3075 } 3076 3077 break; 3078 case 2: { 3079 3080 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3081 3082 3083 /* content: static void mvumi_disable_intr(struct mvumi_hba *mhba)*/ 3084 /* LDV_COMMENT_END_PREP */ 3085 /* LDV_COMMENT_FUNCTION_CALL Function from field "disable_intr" from driver structure with callbacks "mvumi_instance_9143" */ 3086 ldv_handler_precall(); 3087 mvumi_disable_intr( var_group1); 3088 /* LDV_COMMENT_BEGIN_PREP */ 3089 #ifdef CONFIG_PM 3090 #endif 3091 /* LDV_COMMENT_END_PREP */ 3092 3093 3094 3095 3096 } 3097 3098 break; 3099 case 3: { 3100 3101 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3102 3103 3104 /* content: static int mvumi_clear_intr(void *extend)*/ 3105 /* LDV_COMMENT_END_PREP */ 3106 /* LDV_COMMENT_FUNCTION_CALL Function from field "clear_intr" from driver structure with callbacks "mvumi_instance_9143" */ 3107 ldv_handler_precall(); 3108 mvumi_clear_intr( var_mvumi_clear_intr_66_p0); 3109 /* LDV_COMMENT_BEGIN_PREP */ 3110 #ifdef CONFIG_PM 3111 #endif 3112 /* LDV_COMMENT_END_PREP */ 3113 3114 3115 3116 3117 } 3118 3119 break; 3120 case 4: { 3121 3122 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3123 3124 3125 /* content: static unsigned int mvumi_read_fw_status_reg(struct mvumi_hba *mhba)*/ 3126 /* LDV_COMMENT_END_PREP */ 3127 /* LDV_COMMENT_FUNCTION_CALL Function from field "read_fw_status_reg" from driver structure with callbacks "mvumi_instance_9143" */ 3128 ldv_handler_precall(); 3129 mvumi_read_fw_status_reg( var_group1); 3130 /* LDV_COMMENT_BEGIN_PREP */ 3131 #ifdef CONFIG_PM 3132 #endif 3133 /* LDV_COMMENT_END_PREP */ 3134 3135 3136 3137 3138 } 3139 3140 break; 3141 case 5: { 3142 3143 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3144 3145 3146 /* content: static unsigned int mvumi_check_ib_list_9143(struct mvumi_hba *mhba)*/ 3147 /* LDV_COMMENT_END_PREP */ 3148 /* LDV_COMMENT_FUNCTION_CALL Function from field "check_ib_list" from driver structure with callbacks "mvumi_instance_9143" */ 3149 ldv_handler_precall(); 3150 mvumi_check_ib_list_9143( var_group1); 3151 /* LDV_COMMENT_BEGIN_PREP */ 3152 #ifdef CONFIG_PM 3153 #endif 3154 /* LDV_COMMENT_END_PREP */ 3155 3156 3157 3158 3159 } 3160 3161 break; 3162 case 6: { 3163 3164 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3165 3166 3167 /* content: static int mvumi_check_ob_list_9143(struct mvumi_hba *mhba, unsigned int *cur_obf, unsigned int *assign_obf_end)*/ 3168 /* LDV_COMMENT_END_PREP */ 3169 /* LDV_COMMENT_FUNCTION_CALL Function from field "check_ob_list" from driver structure with callbacks "mvumi_instance_9143" */ 3170 ldv_handler_precall(); 3171 mvumi_check_ob_list_9143( var_group1, var_mvumi_check_ob_list_9143_21_p1, var_mvumi_check_ob_list_9143_21_p2); 3172 /* LDV_COMMENT_BEGIN_PREP */ 3173 #ifdef CONFIG_PM 3174 #endif 3175 /* LDV_COMMENT_END_PREP */ 3176 3177 3178 3179 3180 } 3181 3182 break; 3183 case 7: { 3184 3185 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9143 **/ 3186 3187 3188 /* content: static int mvumi_reset_host_9143(struct mvumi_hba *mhba)*/ 3189 /* LDV_COMMENT_END_PREP */ 3190 /* LDV_COMMENT_FUNCTION_CALL Function from field "reset_host" from driver structure with callbacks "mvumi_instance_9143" */ 3191 ldv_handler_precall(); 3192 mvumi_reset_host_9143( var_group1); 3193 /* LDV_COMMENT_BEGIN_PREP */ 3194 #ifdef CONFIG_PM 3195 #endif 3196 /* LDV_COMMENT_END_PREP */ 3197 3198 3199 3200 3201 } 3202 3203 break; 3204 case 8: { 3205 3206 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3207 3208 3209 /* content: static void mvumi_fire_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd)*/ 3210 /* LDV_COMMENT_END_PREP */ 3211 /* LDV_COMMENT_FUNCTION_CALL Function from field "fire_cmd" from driver structure with callbacks "mvumi_instance_9580" */ 3212 ldv_handler_precall(); 3213 mvumi_fire_cmd( var_group1, var_group2); 3214 /* LDV_COMMENT_BEGIN_PREP */ 3215 #ifdef CONFIG_PM 3216 #endif 3217 /* LDV_COMMENT_END_PREP */ 3218 3219 3220 3221 3222 } 3223 3224 break; 3225 case 9: { 3226 3227 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3228 3229 3230 /* content: static void mvumi_enable_intr(struct mvumi_hba *mhba)*/ 3231 /* LDV_COMMENT_END_PREP */ 3232 /* LDV_COMMENT_FUNCTION_CALL Function from field "enable_intr" from driver structure with callbacks "mvumi_instance_9580" */ 3233 ldv_handler_precall(); 3234 mvumi_enable_intr( var_group1); 3235 /* LDV_COMMENT_BEGIN_PREP */ 3236 #ifdef CONFIG_PM 3237 #endif 3238 /* LDV_COMMENT_END_PREP */ 3239 3240 3241 3242 3243 } 3244 3245 break; 3246 case 10: { 3247 3248 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3249 3250 3251 /* content: static void mvumi_disable_intr(struct mvumi_hba *mhba)*/ 3252 /* LDV_COMMENT_END_PREP */ 3253 /* LDV_COMMENT_FUNCTION_CALL Function from field "disable_intr" from driver structure with callbacks "mvumi_instance_9580" */ 3254 ldv_handler_precall(); 3255 mvumi_disable_intr( var_group1); 3256 /* LDV_COMMENT_BEGIN_PREP */ 3257 #ifdef CONFIG_PM 3258 #endif 3259 /* LDV_COMMENT_END_PREP */ 3260 3261 3262 3263 3264 } 3265 3266 break; 3267 case 11: { 3268 3269 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3270 3271 3272 /* content: static int mvumi_clear_intr(void *extend)*/ 3273 /* LDV_COMMENT_END_PREP */ 3274 /* LDV_COMMENT_FUNCTION_CALL Function from field "clear_intr" from driver structure with callbacks "mvumi_instance_9580" */ 3275 ldv_handler_precall(); 3276 mvumi_clear_intr( var_mvumi_clear_intr_66_p0); 3277 /* LDV_COMMENT_BEGIN_PREP */ 3278 #ifdef CONFIG_PM 3279 #endif 3280 /* LDV_COMMENT_END_PREP */ 3281 3282 3283 3284 3285 } 3286 3287 break; 3288 case 12: { 3289 3290 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3291 3292 3293 /* content: static unsigned int mvumi_read_fw_status_reg(struct mvumi_hba *mhba)*/ 3294 /* LDV_COMMENT_END_PREP */ 3295 /* LDV_COMMENT_FUNCTION_CALL Function from field "read_fw_status_reg" from driver structure with callbacks "mvumi_instance_9580" */ 3296 ldv_handler_precall(); 3297 mvumi_read_fw_status_reg( var_group1); 3298 /* LDV_COMMENT_BEGIN_PREP */ 3299 #ifdef CONFIG_PM 3300 #endif 3301 /* LDV_COMMENT_END_PREP */ 3302 3303 3304 3305 3306 } 3307 3308 break; 3309 case 13: { 3310 3311 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3312 3313 3314 /* content: static unsigned int mvumi_check_ib_list_9580(struct mvumi_hba *mhba)*/ 3315 /* LDV_COMMENT_END_PREP */ 3316 /* LDV_COMMENT_FUNCTION_CALL Function from field "check_ib_list" from driver structure with callbacks "mvumi_instance_9580" */ 3317 ldv_handler_precall(); 3318 mvumi_check_ib_list_9580( var_group1); 3319 /* LDV_COMMENT_BEGIN_PREP */ 3320 #ifdef CONFIG_PM 3321 #endif 3322 /* LDV_COMMENT_END_PREP */ 3323 3324 3325 3326 3327 } 3328 3329 break; 3330 case 14: { 3331 3332 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3333 3334 3335 /* content: static int mvumi_check_ob_list_9580(struct mvumi_hba *mhba, unsigned int *cur_obf, unsigned int *assign_obf_end)*/ 3336 /* LDV_COMMENT_END_PREP */ 3337 /* LDV_COMMENT_FUNCTION_CALL Function from field "check_ob_list" from driver structure with callbacks "mvumi_instance_9580" */ 3338 ldv_handler_precall(); 3339 mvumi_check_ob_list_9580( var_group1, var_mvumi_check_ob_list_9580_22_p1, var_mvumi_check_ob_list_9580_22_p2); 3340 /* LDV_COMMENT_BEGIN_PREP */ 3341 #ifdef CONFIG_PM 3342 #endif 3343 /* LDV_COMMENT_END_PREP */ 3344 3345 3346 3347 3348 } 3349 3350 break; 3351 case 15: { 3352 3353 /** STRUCT: struct type: mvumi_instance_template, struct name: mvumi_instance_9580 **/ 3354 3355 3356 /* content: static int mvumi_reset_host_9580(struct mvumi_hba *mhba)*/ 3357 /* LDV_COMMENT_END_PREP */ 3358 /* LDV_COMMENT_FUNCTION_CALL Function from field "reset_host" from driver structure with callbacks "mvumi_instance_9580" */ 3359 ldv_handler_precall(); 3360 mvumi_reset_host_9580( var_group1); 3361 /* LDV_COMMENT_BEGIN_PREP */ 3362 #ifdef CONFIG_PM 3363 #endif 3364 /* LDV_COMMENT_END_PREP */ 3365 3366 3367 3368 3369 } 3370 3371 break; 3372 case 16: { 3373 3374 /** STRUCT: struct type: scsi_host_template, struct name: mvumi_template **/ 3375 3376 3377 /* content: static int mvumi_slave_configure(struct scsi_device *sdev)*/ 3378 /* LDV_COMMENT_END_PREP */ 3379 /* LDV_COMMENT_FUNCTION_CALL Function from field "slave_configure" from driver structure with callbacks "mvumi_template" */ 3380 ldv_handler_precall(); 3381 mvumi_slave_configure( var_group3); 3382 /* LDV_COMMENT_BEGIN_PREP */ 3383 #ifdef CONFIG_PM 3384 #endif 3385 /* LDV_COMMENT_END_PREP */ 3386 3387 3388 3389 3390 } 3391 3392 break; 3393 case 17: { 3394 3395 /** STRUCT: struct type: scsi_host_template, struct name: mvumi_template **/ 3396 3397 3398 /* content: static int mvumi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)*/ 3399 /* LDV_COMMENT_END_PREP */ 3400 /* LDV_COMMENT_FUNCTION_CALL Function from field "queuecommand" from driver structure with callbacks "mvumi_template" */ 3401 ldv_handler_precall(); 3402 mvumi_queue_command( var_group4, var_group5); 3403 /* LDV_COMMENT_BEGIN_PREP */ 3404 #ifdef CONFIG_PM 3405 #endif 3406 /* LDV_COMMENT_END_PREP */ 3407 3408 3409 3410 3411 } 3412 3413 break; 3414 case 18: { 3415 3416 /** STRUCT: struct type: scsi_host_template, struct name: mvumi_template **/ 3417 3418 3419 /* content: static enum blk_eh_timer_return mvumi_timed_out(struct scsi_cmnd *scmd)*/ 3420 /* LDV_COMMENT_END_PREP */ 3421 /* LDV_COMMENT_FUNCTION_CALL Function from field "eh_timed_out" from driver structure with callbacks "mvumi_template" */ 3422 ldv_handler_precall(); 3423 mvumi_timed_out( var_group5); 3424 /* LDV_COMMENT_BEGIN_PREP */ 3425 #ifdef CONFIG_PM 3426 #endif 3427 /* LDV_COMMENT_END_PREP */ 3428 3429 3430 3431 3432 } 3433 3434 break; 3435 case 19: { 3436 3437 /** STRUCT: struct type: scsi_host_template, struct name: mvumi_template **/ 3438 3439 3440 /* content: static int mvumi_host_reset(struct scsi_cmnd *scmd)*/ 3441 /* LDV_COMMENT_END_PREP */ 3442 /* LDV_COMMENT_FUNCTION_CALL Function from field "eh_host_reset_handler" from driver structure with callbacks "mvumi_template" */ 3443 ldv_handler_precall(); 3444 mvumi_host_reset( var_group5); 3445 /* LDV_COMMENT_BEGIN_PREP */ 3446 #ifdef CONFIG_PM 3447 #endif 3448 /* LDV_COMMENT_END_PREP */ 3449 3450 3451 3452 3453 } 3454 3455 break; 3456 case 20: { 3457 3458 /** STRUCT: struct type: pci_driver, struct name: mvumi_pci_driver **/ 3459 if(ldv_s_mvumi_pci_driver_pci_driver==0) { 3460 3461 /* content: static int mvumi_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)*/ 3462 /* LDV_COMMENT_END_PREP */ 3463 /* LDV_COMMENT_FUNCTION_CALL Function from field "probe" from driver structure with callbacks "mvumi_pci_driver". Standart function test for correct return result. */ 3464 res_mvumi_probe_one_75 = mvumi_probe_one( var_group6, var_mvumi_probe_one_75_p1); 3465 ldv_check_return_value(res_mvumi_probe_one_75); 3466 ldv_check_return_value_probe(res_mvumi_probe_one_75); 3467 if(res_mvumi_probe_one_75) 3468 goto ldv_module_exit; 3469 /* LDV_COMMENT_BEGIN_PREP */ 3470 #ifdef CONFIG_PM 3471 #endif 3472 /* LDV_COMMENT_END_PREP */ 3473 ldv_s_mvumi_pci_driver_pci_driver++; 3474 3475 } 3476 3477 } 3478 3479 break; 3480 case 21: { 3481 3482 /** STRUCT: struct type: pci_driver, struct name: mvumi_pci_driver **/ 3483 if(ldv_s_mvumi_pci_driver_pci_driver==1) { 3484 3485 /* content: static void mvumi_detach_one(struct pci_dev *pdev)*/ 3486 /* LDV_COMMENT_END_PREP */ 3487 /* LDV_COMMENT_FUNCTION_CALL Function from field "remove" from driver structure with callbacks "mvumi_pci_driver" */ 3488 ldv_handler_precall(); 3489 mvumi_detach_one( var_group6); 3490 /* LDV_COMMENT_BEGIN_PREP */ 3491 #ifdef CONFIG_PM 3492 #endif 3493 /* LDV_COMMENT_END_PREP */ 3494 ldv_s_mvumi_pci_driver_pci_driver=0; 3495 3496 } 3497 3498 } 3499 3500 break; 3501 case 22: { 3502 3503 /** STRUCT: struct type: pci_driver, struct name: mvumi_pci_driver **/ 3504 3505 3506 /* content: static void mvumi_shutdown(struct pci_dev *pdev)*/ 3507 /* LDV_COMMENT_END_PREP */ 3508 /* LDV_COMMENT_FUNCTION_CALL Function from field "shutdown" from driver structure with callbacks "mvumi_pci_driver" */ 3509 ldv_handler_precall(); 3510 mvumi_shutdown( var_group6); 3511 /* LDV_COMMENT_BEGIN_PREP */ 3512 #ifdef CONFIG_PM 3513 #endif 3514 /* LDV_COMMENT_END_PREP */ 3515 3516 3517 3518 3519 } 3520 3521 break; 3522 case 23: { 3523 3524 /** STRUCT: struct type: pci_driver, struct name: mvumi_pci_driver **/ 3525 3526 3527 /* content: static int __maybe_unused mvumi_suspend(struct pci_dev *pdev, pm_message_t state)*/ 3528 /* LDV_COMMENT_END_PREP */ 3529 /* LDV_COMMENT_FUNCTION_CALL Function from field "suspend" from driver structure with callbacks "mvumi_pci_driver" */ 3530 ldv_handler_precall(); 3531 mvumi_suspend( var_group6, var_mvumi_suspend_78_p1); 3532 /* LDV_COMMENT_BEGIN_PREP */ 3533 #ifdef CONFIG_PM 3534 #endif 3535 /* LDV_COMMENT_END_PREP */ 3536 3537 3538 3539 3540 } 3541 3542 break; 3543 case 24: { 3544 3545 /** STRUCT: struct type: pci_driver, struct name: mvumi_pci_driver **/ 3546 3547 3548 /* content: static int __maybe_unused mvumi_resume(struct pci_dev *pdev)*/ 3549 /* LDV_COMMENT_END_PREP */ 3550 /* LDV_COMMENT_FUNCTION_CALL Function from field "resume" from driver structure with callbacks "mvumi_pci_driver" */ 3551 ldv_handler_precall(); 3552 mvumi_resume( var_group6); 3553 /* LDV_COMMENT_BEGIN_PREP */ 3554 #ifdef CONFIG_PM 3555 #endif 3556 /* LDV_COMMENT_END_PREP */ 3557 3558 3559 3560 3561 } 3562 3563 break; 3564 case 25: { 3565 3566 /** CALLBACK SECTION request_irq **/ 3567 LDV_IN_INTERRUPT=2; 3568 3569 /* content: static irqreturn_t mvumi_isr_handler(int irq, void *devp)*/ 3570 /* LDV_COMMENT_END_PREP */ 3571 /* LDV_COMMENT_FUNCTION_CALL */ 3572 ldv_handler_precall(); 3573 mvumi_isr_handler( var_mvumi_isr_handler_61_p0, var_mvumi_isr_handler_61_p1); 3574 /* LDV_COMMENT_BEGIN_PREP */ 3575 #ifdef CONFIG_PM 3576 #endif 3577 /* LDV_COMMENT_END_PREP */ 3578 LDV_IN_INTERRUPT=1; 3579 3580 3581 3582 } 3583 3584 break; 3585 default: break; 3586 3587 } 3588 3589 } 3590 3591 ldv_module_exit: 3592 3593 /** INIT: init_type: ST_MODULE_EXIT **/ 3594 /* content: static void __exit mvumi_exit(void)*/ 3595 /* LDV_COMMENT_BEGIN_PREP */ 3596 #ifdef CONFIG_PM 3597 #endif 3598 /* LDV_COMMENT_END_PREP */ 3599 /* LDV_COMMENT_FUNCTION_CALL Kernel calls driver release function before driver will be uploaded from kernel. This function declared as "MODULE_EXIT(function name)". */ 3600 ldv_handler_precall(); 3601 mvumi_exit(); 3602 3603 /* LDV_COMMENT_FUNCTION_CALL Checks that all resources and locks are correctly released before the driver will be unloaded. */ 3604 ldv_final: ldv_check_final_state(); 3605 3606 /* LDV_COMMENT_END_FUNCTION_CALL_SECTION */ 3607 return; 3608 3609 } 3610 #endif 3611 3612 /* LDV_COMMENT_END_MAIN */
1 2 #include <linux/kernel.h> 3 bool ldv_is_err(const void *ptr); 4 bool ldv_is_err_or_null(const void *ptr); 5 void* ldv_err_ptr(long error); 6 long ldv_ptr_err(const void *ptr); 7 8 extern void ldv_dma_map_page(void); 9 extern void ldv_dma_mapping_error(void); 10 #line 1 "/home/vitaly/ldv-launches/work/current--X--drivers--X--defaultlinux-4.11-rc1.tar.xz--X--331_1a--X--cpachecker/linux-4.11-rc1.tar.xz/csd_deg_dscv/2204/dscv_tempdir/dscv/ri/331_1a/drivers/scsi/mvumi.c" 11 12 /* 13 * Marvell UMI driver 14 * 15 * Copyright 2011 Marvell. <jyli@marvell.com> 16 * 17 * This file is licensed under GPLv2. 18 * 19 * This program is free software; you can redistribute it and/or 20 * modify it under the terms of the GNU General Public License as 21 * published by the Free Software Foundation; version 2 of the 22 * License. 23 * 24 * This program is distributed in the hope that it will be useful, 25 * but WITHOUT ANY WARRANTY; without even the implied warranty of 26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 27 * General Public License for more details. 28 * 29 * You should have received a copy of the GNU General Public License 30 * along with this program; if not, write to the Free Software 31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 32 * USA 33 */ 34 35 #include <linux/kernel.h> 36 #include <linux/module.h> 37 #include <linux/moduleparam.h> 38 #include <linux/init.h> 39 #include <linux/device.h> 40 #include <linux/pci.h> 41 #include <linux/list.h> 42 #include <linux/spinlock.h> 43 #include <linux/interrupt.h> 44 #include <linux/delay.h> 45 #include <linux/ktime.h> 46 #include <linux/blkdev.h> 47 #include <linux/io.h> 48 #include <scsi/scsi.h> 49 #include <scsi/scsi_cmnd.h> 50 #include <scsi/scsi_device.h> 51 #include <scsi/scsi_host.h> 52 #include <scsi/scsi_transport.h> 53 #include <scsi/scsi_eh.h> 54 #include <linux/uaccess.h> 55 #include <linux/kthread.h> 56 57 #include "mvumi.h" 58 59 MODULE_LICENSE("GPL"); 60 MODULE_AUTHOR("jyli@marvell.com"); 61 MODULE_DESCRIPTION("Marvell UMI Driver"); 62 63 static const struct pci_device_id mvumi_pci_table[] = { 64 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, PCI_DEVICE_ID_MARVELL_MV9143) }, 65 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL_EXT, PCI_DEVICE_ID_MARVELL_MV9580) }, 66 { 0 } 67 }; 68 69 MODULE_DEVICE_TABLE(pci, mvumi_pci_table); 70 71 static void tag_init(struct mvumi_tag *st, unsigned short size) 72 { 73 unsigned short i; 74 BUG_ON(size != st->size); 75 st->top = size; 76 for (i = 0; i < size; i++) 77 st->stack[i] = size - 1 - i; 78 } 79 80 static unsigned short tag_get_one(struct mvumi_hba *mhba, struct mvumi_tag *st) 81 { 82 BUG_ON(st->top <= 0); 83 return st->stack[--st->top]; 84 } 85 86 static void tag_release_one(struct mvumi_hba *mhba, struct mvumi_tag *st, 87 unsigned short tag) 88 { 89 BUG_ON(st->top >= st->size); 90 st->stack[st->top++] = tag; 91 } 92 93 static bool tag_is_empty(struct mvumi_tag *st) 94 { 95 if (st->top == 0) 96 return 1; 97 else 98 return 0; 99 } 100 101 static void mvumi_unmap_pci_addr(struct pci_dev *dev, void **addr_array) 102 { 103 int i; 104 105 for (i = 0; i < MAX_BASE_ADDRESS; i++) 106 if ((pci_resource_flags(dev, i) & IORESOURCE_MEM) && 107 addr_array[i]) 108 pci_iounmap(dev, addr_array[i]); 109 } 110 111 static int mvumi_map_pci_addr(struct pci_dev *dev, void **addr_array) 112 { 113 int i; 114 115 for (i = 0; i < MAX_BASE_ADDRESS; i++) { 116 if (pci_resource_flags(dev, i) & IORESOURCE_MEM) { 117 addr_array[i] = pci_iomap(dev, i, 0); 118 if (!addr_array[i]) { 119 dev_err(&dev->dev, "failed to map Bar[%d]\n", 120 i); 121 mvumi_unmap_pci_addr(dev, addr_array); 122 return -ENOMEM; 123 } 124 } else 125 addr_array[i] = NULL; 126 127 dev_dbg(&dev->dev, "Bar %d : %p.\n", i, addr_array[i]); 128 } 129 130 return 0; 131 } 132 133 static struct mvumi_res *mvumi_alloc_mem_resource(struct mvumi_hba *mhba, 134 enum resource_type type, unsigned int size) 135 { 136 struct mvumi_res *res = kzalloc(sizeof(*res), GFP_ATOMIC); 137 138 if (!res) { 139 dev_err(&mhba->pdev->dev, 140 "Failed to allocate memory for resource manager.\n"); 141 return NULL; 142 } 143 144 switch (type) { 145 case RESOURCE_CACHED_MEMORY: 146 res->virt_addr = kzalloc(size, GFP_ATOMIC); 147 if (!res->virt_addr) { 148 dev_err(&mhba->pdev->dev, 149 "unable to allocate memory,size = %d.\n", size); 150 kfree(res); 151 return NULL; 152 } 153 break; 154 155 case RESOURCE_UNCACHED_MEMORY: 156 size = round_up(size, 8); 157 res->virt_addr = pci_zalloc_consistent(mhba->pdev, size, 158 &res->bus_addr); 159 if (!res->virt_addr) { 160 dev_err(&mhba->pdev->dev, 161 "unable to allocate consistent mem," 162 "size = %d.\n", size); 163 kfree(res); 164 return NULL; 165 } 166 break; 167 168 default: 169 dev_err(&mhba->pdev->dev, "unknown resource type %d.\n", type); 170 kfree(res); 171 return NULL; 172 } 173 174 res->type = type; 175 res->size = size; 176 INIT_LIST_HEAD(&res->entry); 177 list_add_tail(&res->entry, &mhba->res_list); 178 179 return res; 180 } 181 182 static void mvumi_release_mem_resource(struct mvumi_hba *mhba) 183 { 184 struct mvumi_res *res, *tmp; 185 186 list_for_each_entry_safe(res, tmp, &mhba->res_list, entry) { 187 switch (res->type) { 188 case RESOURCE_UNCACHED_MEMORY: 189 pci_free_consistent(mhba->pdev, res->size, 190 res->virt_addr, res->bus_addr); 191 break; 192 case RESOURCE_CACHED_MEMORY: 193 kfree(res->virt_addr); 194 break; 195 default: 196 dev_err(&mhba->pdev->dev, 197 "unknown resource type %d\n", res->type); 198 break; 199 } 200 list_del(&res->entry); 201 kfree(res); 202 } 203 mhba->fw_flag &= ~MVUMI_FW_ALLOC; 204 } 205 206 /** 207 * mvumi_make_sgl - Prepares SGL 208 * @mhba: Adapter soft state 209 * @scmd: SCSI command from the mid-layer 210 * @sgl_p: SGL to be filled in 211 * @sg_count return the number of SG elements 212 * 213 * If successful, this function returns 0. otherwise, it returns -1. 214 */ 215 static int mvumi_make_sgl(struct mvumi_hba *mhba, struct scsi_cmnd *scmd, 216 void *sgl_p, unsigned char *sg_count) 217 { 218 struct scatterlist *sg; 219 struct mvumi_sgl *m_sg = (struct mvumi_sgl *) sgl_p; 220 unsigned int i; 221 unsigned int sgnum = scsi_sg_count(scmd); 222 dma_addr_t busaddr; 223 224 if (sgnum) { 225 sg = scsi_sglist(scmd); 226 *sg_count = pci_map_sg(mhba->pdev, sg, sgnum, 227 (int) scmd->sc_data_direction); 228 if (*sg_count > mhba->max_sge) { 229 dev_err(&mhba->pdev->dev, "sg count[0x%x] is bigger " 230 "than max sg[0x%x].\n", 231 *sg_count, mhba->max_sge); 232 return -1; 233 } 234 for (i = 0; i < *sg_count; i++) { 235 busaddr = sg_dma_address(&sg[i]); 236 m_sg->baseaddr_l = cpu_to_le32(lower_32_bits(busaddr)); 237 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(busaddr)); 238 m_sg->flags = 0; 239 sgd_setsz(mhba, m_sg, cpu_to_le32(sg_dma_len(&sg[i]))); 240 if ((i + 1) == *sg_count) 241 m_sg->flags |= 1U << mhba->eot_flag; 242 243 sgd_inc(mhba, m_sg); 244 } 245 } else { 246 scmd->SCp.dma_handle = scsi_bufflen(scmd) ? 247 pci_map_single(mhba->pdev, scsi_sglist(scmd), 248 scsi_bufflen(scmd), 249 (int) scmd->sc_data_direction) 250 : 0; 251 busaddr = scmd->SCp.dma_handle; 252 m_sg->baseaddr_l = cpu_to_le32(lower_32_bits(busaddr)); 253 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(busaddr)); 254 m_sg->flags = 1U << mhba->eot_flag; 255 sgd_setsz(mhba, m_sg, cpu_to_le32(scsi_bufflen(scmd))); 256 *sg_count = 1; 257 } 258 259 return 0; 260 } 261 262 static int mvumi_internal_cmd_sgl(struct mvumi_hba *mhba, struct mvumi_cmd *cmd, 263 unsigned int size) 264 { 265 struct mvumi_sgl *m_sg; 266 void *virt_addr; 267 dma_addr_t phy_addr; 268 269 if (size == 0) 270 return 0; 271 272 virt_addr = pci_zalloc_consistent(mhba->pdev, size, &phy_addr); 273 if (!virt_addr) 274 return -1; 275 276 m_sg = (struct mvumi_sgl *) &cmd->frame->payload[0]; 277 cmd->frame->sg_counts = 1; 278 cmd->data_buf = virt_addr; 279 280 m_sg->baseaddr_l = cpu_to_le32(lower_32_bits(phy_addr)); 281 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(phy_addr)); 282 m_sg->flags = 1U << mhba->eot_flag; 283 sgd_setsz(mhba, m_sg, cpu_to_le32(size)); 284 285 return 0; 286 } 287 288 static struct mvumi_cmd *mvumi_create_internal_cmd(struct mvumi_hba *mhba, 289 unsigned int buf_size) 290 { 291 struct mvumi_cmd *cmd; 292 293 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 294 if (!cmd) { 295 dev_err(&mhba->pdev->dev, "failed to create a internal cmd\n"); 296 return NULL; 297 } 298 INIT_LIST_HEAD(&cmd->queue_pointer); 299 300 cmd->frame = pci_alloc_consistent(mhba->pdev, 301 mhba->ib_max_size, &cmd->frame_phys); 302 if (!cmd->frame) { 303 dev_err(&mhba->pdev->dev, "failed to allocate memory for FW" 304 " frame,size = %d.\n", mhba->ib_max_size); 305 kfree(cmd); 306 return NULL; 307 } 308 309 if (buf_size) { 310 if (mvumi_internal_cmd_sgl(mhba, cmd, buf_size)) { 311 dev_err(&mhba->pdev->dev, "failed to allocate memory" 312 " for internal frame\n"); 313 pci_free_consistent(mhba->pdev, mhba->ib_max_size, 314 cmd->frame, cmd->frame_phys); 315 kfree(cmd); 316 return NULL; 317 } 318 } else 319 cmd->frame->sg_counts = 0; 320 321 return cmd; 322 } 323 324 static void mvumi_delete_internal_cmd(struct mvumi_hba *mhba, 325 struct mvumi_cmd *cmd) 326 { 327 struct mvumi_sgl *m_sg; 328 unsigned int size; 329 dma_addr_t phy_addr; 330 331 if (cmd && cmd->frame) { 332 if (cmd->frame->sg_counts) { 333 m_sg = (struct mvumi_sgl *) &cmd->frame->payload[0]; 334 sgd_getsz(mhba, m_sg, size); 335 336 phy_addr = (dma_addr_t) m_sg->baseaddr_l | 337 (dma_addr_t) ((m_sg->baseaddr_h << 16) << 16); 338 339 pci_free_consistent(mhba->pdev, size, cmd->data_buf, 340 phy_addr); 341 } 342 pci_free_consistent(mhba->pdev, mhba->ib_max_size, 343 cmd->frame, cmd->frame_phys); 344 kfree(cmd); 345 } 346 } 347 348 /** 349 * mvumi_get_cmd - Get a command from the free pool 350 * @mhba: Adapter soft state 351 * 352 * Returns a free command from the pool 353 */ 354 static struct mvumi_cmd *mvumi_get_cmd(struct mvumi_hba *mhba) 355 { 356 struct mvumi_cmd *cmd = NULL; 357 358 if (likely(!list_empty(&mhba->cmd_pool))) { 359 cmd = list_entry((&mhba->cmd_pool)->next, 360 struct mvumi_cmd, queue_pointer); 361 list_del_init(&cmd->queue_pointer); 362 } else 363 dev_warn(&mhba->pdev->dev, "command pool is empty!\n"); 364 365 return cmd; 366 } 367 368 /** 369 * mvumi_return_cmd - Return a cmd to free command pool 370 * @mhba: Adapter soft state 371 * @cmd: Command packet to be returned to free command pool 372 */ 373 static inline void mvumi_return_cmd(struct mvumi_hba *mhba, 374 struct mvumi_cmd *cmd) 375 { 376 cmd->scmd = NULL; 377 list_add_tail(&cmd->queue_pointer, &mhba->cmd_pool); 378 } 379 380 /** 381 * mvumi_free_cmds - Free all the cmds in the free cmd pool 382 * @mhba: Adapter soft state 383 */ 384 static void mvumi_free_cmds(struct mvumi_hba *mhba) 385 { 386 struct mvumi_cmd *cmd; 387 388 while (!list_empty(&mhba->cmd_pool)) { 389 cmd = list_first_entry(&mhba->cmd_pool, struct mvumi_cmd, 390 queue_pointer); 391 list_del(&cmd->queue_pointer); 392 if (!(mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC)) 393 kfree(cmd->frame); 394 kfree(cmd); 395 } 396 } 397 398 /** 399 * mvumi_alloc_cmds - Allocates the command packets 400 * @mhba: Adapter soft state 401 * 402 */ 403 static int mvumi_alloc_cmds(struct mvumi_hba *mhba) 404 { 405 int i; 406 struct mvumi_cmd *cmd; 407 408 for (i = 0; i < mhba->max_io; i++) { 409 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 410 if (!cmd) 411 goto err_exit; 412 413 INIT_LIST_HEAD(&cmd->queue_pointer); 414 list_add_tail(&cmd->queue_pointer, &mhba->cmd_pool); 415 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 416 cmd->frame = mhba->ib_frame + i * mhba->ib_max_size; 417 cmd->frame_phys = mhba->ib_frame_phys 418 + i * mhba->ib_max_size; 419 } else 420 cmd->frame = kzalloc(mhba->ib_max_size, GFP_KERNEL); 421 if (!cmd->frame) 422 goto err_exit; 423 } 424 return 0; 425 426 err_exit: 427 dev_err(&mhba->pdev->dev, 428 "failed to allocate memory for cmd[0x%x].\n", i); 429 while (!list_empty(&mhba->cmd_pool)) { 430 cmd = list_first_entry(&mhba->cmd_pool, struct mvumi_cmd, 431 queue_pointer); 432 list_del(&cmd->queue_pointer); 433 if (!(mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC)) 434 kfree(cmd->frame); 435 kfree(cmd); 436 } 437 return -ENOMEM; 438 } 439 440 static unsigned int mvumi_check_ib_list_9143(struct mvumi_hba *mhba) 441 { 442 unsigned int ib_rp_reg; 443 struct mvumi_hw_regs *regs = mhba->regs; 444 445 ib_rp_reg = ioread32(mhba->regs->inb_read_pointer); 446 447 if (unlikely(((ib_rp_reg & regs->cl_slot_num_mask) == 448 (mhba->ib_cur_slot & regs->cl_slot_num_mask)) && 449 ((ib_rp_reg & regs->cl_pointer_toggle) 450 != (mhba->ib_cur_slot & regs->cl_pointer_toggle)))) { 451 dev_warn(&mhba->pdev->dev, "no free slot to use.\n"); 452 return 0; 453 } 454 if (atomic_read(&mhba->fw_outstanding) >= mhba->max_io) { 455 dev_warn(&mhba->pdev->dev, "firmware io overflow.\n"); 456 return 0; 457 } else { 458 return mhba->max_io - atomic_read(&mhba->fw_outstanding); 459 } 460 } 461 462 static unsigned int mvumi_check_ib_list_9580(struct mvumi_hba *mhba) 463 { 464 unsigned int count; 465 if (atomic_read(&mhba->fw_outstanding) >= (mhba->max_io - 1)) 466 return 0; 467 count = ioread32(mhba->ib_shadow); 468 if (count == 0xffff) 469 return 0; 470 return count; 471 } 472 473 static void mvumi_get_ib_list_entry(struct mvumi_hba *mhba, void **ib_entry) 474 { 475 unsigned int cur_ib_entry; 476 477 cur_ib_entry = mhba->ib_cur_slot & mhba->regs->cl_slot_num_mask; 478 cur_ib_entry++; 479 if (cur_ib_entry >= mhba->list_num_io) { 480 cur_ib_entry -= mhba->list_num_io; 481 mhba->ib_cur_slot ^= mhba->regs->cl_pointer_toggle; 482 } 483 mhba->ib_cur_slot &= ~mhba->regs->cl_slot_num_mask; 484 mhba->ib_cur_slot |= (cur_ib_entry & mhba->regs->cl_slot_num_mask); 485 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 486 *ib_entry = mhba->ib_list + cur_ib_entry * 487 sizeof(struct mvumi_dyn_list_entry); 488 } else { 489 *ib_entry = mhba->ib_list + cur_ib_entry * mhba->ib_max_size; 490 } 491 atomic_inc(&mhba->fw_outstanding); 492 } 493 494 static void mvumi_send_ib_list_entry(struct mvumi_hba *mhba) 495 { 496 iowrite32(0xffff, mhba->ib_shadow); 497 iowrite32(mhba->ib_cur_slot, mhba->regs->inb_write_pointer); 498 } 499 500 static char mvumi_check_ob_frame(struct mvumi_hba *mhba, 501 unsigned int cur_obf, struct mvumi_rsp_frame *p_outb_frame) 502 { 503 unsigned short tag, request_id; 504 505 udelay(1); 506 p_outb_frame = mhba->ob_list + cur_obf * mhba->ob_max_size; 507 request_id = p_outb_frame->request_id; 508 tag = p_outb_frame->tag; 509 if (tag > mhba->tag_pool.size) { 510 dev_err(&mhba->pdev->dev, "ob frame data error\n"); 511 return -1; 512 } 513 if (mhba->tag_cmd[tag] == NULL) { 514 dev_err(&mhba->pdev->dev, "tag[0x%x] with NO command\n", tag); 515 return -1; 516 } else if (mhba->tag_cmd[tag]->request_id != request_id && 517 mhba->request_id_enabled) { 518 dev_err(&mhba->pdev->dev, "request ID from FW:0x%x," 519 "cmd request ID:0x%x\n", request_id, 520 mhba->tag_cmd[tag]->request_id); 521 return -1; 522 } 523 524 return 0; 525 } 526 527 static int mvumi_check_ob_list_9143(struct mvumi_hba *mhba, 528 unsigned int *cur_obf, unsigned int *assign_obf_end) 529 { 530 unsigned int ob_write, ob_write_shadow; 531 struct mvumi_hw_regs *regs = mhba->regs; 532 533 do { 534 ob_write = ioread32(regs->outb_copy_pointer); 535 ob_write_shadow = ioread32(mhba->ob_shadow); 536 } while ((ob_write & regs->cl_slot_num_mask) != ob_write_shadow); 537 538 *cur_obf = mhba->ob_cur_slot & mhba->regs->cl_slot_num_mask; 539 *assign_obf_end = ob_write & mhba->regs->cl_slot_num_mask; 540 541 if ((ob_write & regs->cl_pointer_toggle) != 542 (mhba->ob_cur_slot & regs->cl_pointer_toggle)) { 543 *assign_obf_end += mhba->list_num_io; 544 } 545 return 0; 546 } 547 548 static int mvumi_check_ob_list_9580(struct mvumi_hba *mhba, 549 unsigned int *cur_obf, unsigned int *assign_obf_end) 550 { 551 unsigned int ob_write; 552 struct mvumi_hw_regs *regs = mhba->regs; 553 554 ob_write = ioread32(regs->outb_read_pointer); 555 ob_write = ioread32(regs->outb_copy_pointer); 556 *cur_obf = mhba->ob_cur_slot & mhba->regs->cl_slot_num_mask; 557 *assign_obf_end = ob_write & mhba->regs->cl_slot_num_mask; 558 if (*assign_obf_end < *cur_obf) 559 *assign_obf_end += mhba->list_num_io; 560 else if (*assign_obf_end == *cur_obf) 561 return -1; 562 return 0; 563 } 564 565 static void mvumi_receive_ob_list_entry(struct mvumi_hba *mhba) 566 { 567 unsigned int cur_obf, assign_obf_end, i; 568 struct mvumi_ob_data *ob_data; 569 struct mvumi_rsp_frame *p_outb_frame; 570 struct mvumi_hw_regs *regs = mhba->regs; 571 572 if (mhba->instancet->check_ob_list(mhba, &cur_obf, &assign_obf_end)) 573 return; 574 575 for (i = (assign_obf_end - cur_obf); i != 0; i--) { 576 cur_obf++; 577 if (cur_obf >= mhba->list_num_io) { 578 cur_obf -= mhba->list_num_io; 579 mhba->ob_cur_slot ^= regs->cl_pointer_toggle; 580 } 581 582 p_outb_frame = mhba->ob_list + cur_obf * mhba->ob_max_size; 583 584 /* Copy pointer may point to entry in outbound list 585 * before entry has valid data 586 */ 587 if (unlikely(p_outb_frame->tag > mhba->tag_pool.size || 588 mhba->tag_cmd[p_outb_frame->tag] == NULL || 589 p_outb_frame->request_id != 590 mhba->tag_cmd[p_outb_frame->tag]->request_id)) 591 if (mvumi_check_ob_frame(mhba, cur_obf, p_outb_frame)) 592 continue; 593 594 if (!list_empty(&mhba->ob_data_list)) { 595 ob_data = (struct mvumi_ob_data *) 596 list_first_entry(&mhba->ob_data_list, 597 struct mvumi_ob_data, list); 598 list_del_init(&ob_data->list); 599 } else { 600 ob_data = NULL; 601 if (cur_obf == 0) { 602 cur_obf = mhba->list_num_io - 1; 603 mhba->ob_cur_slot ^= regs->cl_pointer_toggle; 604 } else 605 cur_obf -= 1; 606 break; 607 } 608 609 memcpy(ob_data->data, p_outb_frame, mhba->ob_max_size); 610 p_outb_frame->tag = 0xff; 611 612 list_add_tail(&ob_data->list, &mhba->free_ob_list); 613 } 614 mhba->ob_cur_slot &= ~regs->cl_slot_num_mask; 615 mhba->ob_cur_slot |= (cur_obf & regs->cl_slot_num_mask); 616 iowrite32(mhba->ob_cur_slot, regs->outb_read_pointer); 617 } 618 619 static void mvumi_reset(struct mvumi_hba *mhba) 620 { 621 struct mvumi_hw_regs *regs = mhba->regs; 622 623 iowrite32(0, regs->enpointa_mask_reg); 624 if (ioread32(regs->arm_to_pciea_msg1) != HANDSHAKE_DONESTATE) 625 return; 626 627 iowrite32(DRBL_SOFT_RESET, regs->pciea_to_arm_drbl_reg); 628 } 629 630 static unsigned char mvumi_start(struct mvumi_hba *mhba); 631 632 static int mvumi_wait_for_outstanding(struct mvumi_hba *mhba) 633 { 634 mhba->fw_state = FW_STATE_ABORT; 635 mvumi_reset(mhba); 636 637 if (mvumi_start(mhba)) 638 return FAILED; 639 else 640 return SUCCESS; 641 } 642 643 static int mvumi_wait_for_fw(struct mvumi_hba *mhba) 644 { 645 struct mvumi_hw_regs *regs = mhba->regs; 646 u32 tmp; 647 unsigned long before; 648 before = jiffies; 649 650 iowrite32(0, regs->enpointa_mask_reg); 651 tmp = ioread32(regs->arm_to_pciea_msg1); 652 while (tmp != HANDSHAKE_READYSTATE) { 653 iowrite32(DRBL_MU_RESET, regs->pciea_to_arm_drbl_reg); 654 if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) { 655 dev_err(&mhba->pdev->dev, 656 "FW reset failed [0x%x].\n", tmp); 657 return FAILED; 658 } 659 660 msleep(500); 661 rmb(); 662 tmp = ioread32(regs->arm_to_pciea_msg1); 663 } 664 665 return SUCCESS; 666 } 667 668 static void mvumi_backup_bar_addr(struct mvumi_hba *mhba) 669 { 670 unsigned char i; 671 672 for (i = 0; i < MAX_BASE_ADDRESS; i++) { 673 pci_read_config_dword(mhba->pdev, 0x10 + i * 4, 674 &mhba->pci_base[i]); 675 } 676 } 677 678 static void mvumi_restore_bar_addr(struct mvumi_hba *mhba) 679 { 680 unsigned char i; 681 682 for (i = 0; i < MAX_BASE_ADDRESS; i++) { 683 if (mhba->pci_base[i]) 684 pci_write_config_dword(mhba->pdev, 0x10 + i * 4, 685 mhba->pci_base[i]); 686 } 687 } 688 689 static unsigned int mvumi_pci_set_master(struct pci_dev *pdev) 690 { 691 unsigned int ret = 0; 692 pci_set_master(pdev); 693 694 if (IS_DMA64) { 695 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) 696 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 697 } else 698 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 699 700 return ret; 701 } 702 703 static int mvumi_reset_host_9580(struct mvumi_hba *mhba) 704 { 705 mhba->fw_state = FW_STATE_ABORT; 706 707 iowrite32(0, mhba->regs->reset_enable); 708 iowrite32(0xf, mhba->regs->reset_request); 709 710 iowrite32(0x10, mhba->regs->reset_enable); 711 iowrite32(0x10, mhba->regs->reset_request); 712 msleep(100); 713 pci_disable_device(mhba->pdev); 714 715 if (pci_enable_device(mhba->pdev)) { 716 dev_err(&mhba->pdev->dev, "enable device failed\n"); 717 return FAILED; 718 } 719 if (mvumi_pci_set_master(mhba->pdev)) { 720 dev_err(&mhba->pdev->dev, "set master failed\n"); 721 return FAILED; 722 } 723 mvumi_restore_bar_addr(mhba); 724 if (mvumi_wait_for_fw(mhba) == FAILED) 725 return FAILED; 726 727 return mvumi_wait_for_outstanding(mhba); 728 } 729 730 static int mvumi_reset_host_9143(struct mvumi_hba *mhba) 731 { 732 return mvumi_wait_for_outstanding(mhba); 733 } 734 735 static int mvumi_host_reset(struct scsi_cmnd *scmd) 736 { 737 struct mvumi_hba *mhba; 738 739 mhba = (struct mvumi_hba *) scmd->device->host->hostdata; 740 741 scmd_printk(KERN_NOTICE, scmd, "RESET -%ld cmd=%x retries=%x\n", 742 scmd->serial_number, scmd->cmnd[0], scmd->retries); 743 744 return mhba->instancet->reset_host(mhba); 745 } 746 747 static int mvumi_issue_blocked_cmd(struct mvumi_hba *mhba, 748 struct mvumi_cmd *cmd) 749 { 750 unsigned long flags; 751 752 cmd->cmd_status = REQ_STATUS_PENDING; 753 754 if (atomic_read(&cmd->sync_cmd)) { 755 dev_err(&mhba->pdev->dev, 756 "last blocked cmd not finished, sync_cmd = %d\n", 757 atomic_read(&cmd->sync_cmd)); 758 BUG_ON(1); 759 return -1; 760 } 761 atomic_inc(&cmd->sync_cmd); 762 spin_lock_irqsave(mhba->shost->host_lock, flags); 763 mhba->instancet->fire_cmd(mhba, cmd); 764 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 765 766 wait_event_timeout(mhba->int_cmd_wait_q, 767 (cmd->cmd_status != REQ_STATUS_PENDING), 768 MVUMI_INTERNAL_CMD_WAIT_TIME * HZ); 769 770 /* command timeout */ 771 if (atomic_read(&cmd->sync_cmd)) { 772 spin_lock_irqsave(mhba->shost->host_lock, flags); 773 atomic_dec(&cmd->sync_cmd); 774 if (mhba->tag_cmd[cmd->frame->tag]) { 775 mhba->tag_cmd[cmd->frame->tag] = 0; 776 dev_warn(&mhba->pdev->dev, "TIMEOUT:release tag [%d]\n", 777 cmd->frame->tag); 778 tag_release_one(mhba, &mhba->tag_pool, cmd->frame->tag); 779 } 780 if (!list_empty(&cmd->queue_pointer)) { 781 dev_warn(&mhba->pdev->dev, 782 "TIMEOUT:A internal command doesn't send!\n"); 783 list_del_init(&cmd->queue_pointer); 784 } else 785 atomic_dec(&mhba->fw_outstanding); 786 787 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 788 } 789 return 0; 790 } 791 792 static void mvumi_release_fw(struct mvumi_hba *mhba) 793 { 794 mvumi_free_cmds(mhba); 795 mvumi_release_mem_resource(mhba); 796 mvumi_unmap_pci_addr(mhba->pdev, mhba->base_addr); 797 pci_free_consistent(mhba->pdev, HSP_MAX_SIZE, 798 mhba->handshake_page, mhba->handshake_page_phys); 799 kfree(mhba->regs); 800 pci_release_regions(mhba->pdev); 801 } 802 803 static unsigned char mvumi_flush_cache(struct mvumi_hba *mhba) 804 { 805 struct mvumi_cmd *cmd; 806 struct mvumi_msg_frame *frame; 807 unsigned char device_id, retry = 0; 808 unsigned char bitcount = sizeof(unsigned char) * 8; 809 810 for (device_id = 0; device_id < mhba->max_target_id; device_id++) { 811 if (!(mhba->target_map[device_id / bitcount] & 812 (1 << (device_id % bitcount)))) 813 continue; 814 get_cmd: cmd = mvumi_create_internal_cmd(mhba, 0); 815 if (!cmd) { 816 if (retry++ >= 5) { 817 dev_err(&mhba->pdev->dev, "failed to get memory" 818 " for internal flush cache cmd for " 819 "device %d", device_id); 820 retry = 0; 821 continue; 822 } else 823 goto get_cmd; 824 } 825 cmd->scmd = NULL; 826 cmd->cmd_status = REQ_STATUS_PENDING; 827 atomic_set(&cmd->sync_cmd, 0); 828 frame = cmd->frame; 829 frame->req_function = CL_FUN_SCSI_CMD; 830 frame->device_id = device_id; 831 frame->cmd_flag = CMD_FLAG_NON_DATA; 832 frame->data_transfer_length = 0; 833 frame->cdb_length = MAX_COMMAND_SIZE; 834 memset(frame->cdb, 0, MAX_COMMAND_SIZE); 835 frame->cdb[0] = SCSI_CMD_MARVELL_SPECIFIC; 836 frame->cdb[1] = CDB_CORE_MODULE; 837 frame->cdb[2] = CDB_CORE_SHUTDOWN; 838 839 mvumi_issue_blocked_cmd(mhba, cmd); 840 if (cmd->cmd_status != SAM_STAT_GOOD) { 841 dev_err(&mhba->pdev->dev, 842 "device %d flush cache failed, status=0x%x.\n", 843 device_id, cmd->cmd_status); 844 } 845 846 mvumi_delete_internal_cmd(mhba, cmd); 847 } 848 return 0; 849 } 850 851 static unsigned char 852 mvumi_calculate_checksum(struct mvumi_hs_header *p_header, 853 unsigned short len) 854 { 855 unsigned char *ptr; 856 unsigned char ret = 0, i; 857 858 ptr = (unsigned char *) p_header->frame_content; 859 for (i = 0; i < len; i++) { 860 ret ^= *ptr; 861 ptr++; 862 } 863 864 return ret; 865 } 866 867 static void mvumi_hs_build_page(struct mvumi_hba *mhba, 868 struct mvumi_hs_header *hs_header) 869 { 870 struct mvumi_hs_page2 *hs_page2; 871 struct mvumi_hs_page4 *hs_page4; 872 struct mvumi_hs_page3 *hs_page3; 873 u64 time; 874 u64 local_time; 875 876 switch (hs_header->page_code) { 877 case HS_PAGE_HOST_INFO: 878 hs_page2 = (struct mvumi_hs_page2 *) hs_header; 879 hs_header->frame_length = sizeof(*hs_page2) - 4; 880 memset(hs_header->frame_content, 0, hs_header->frame_length); 881 hs_page2->host_type = 3; /* 3 mean linux*/ 882 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) 883 hs_page2->host_cap = 0x08;/* host dynamic source mode */ 884 hs_page2->host_ver.ver_major = VER_MAJOR; 885 hs_page2->host_ver.ver_minor = VER_MINOR; 886 hs_page2->host_ver.ver_oem = VER_OEM; 887 hs_page2->host_ver.ver_build = VER_BUILD; 888 hs_page2->system_io_bus = 0; 889 hs_page2->slot_number = 0; 890 hs_page2->intr_level = 0; 891 hs_page2->intr_vector = 0; 892 time = ktime_get_real_seconds(); 893 local_time = (time - (sys_tz.tz_minuteswest * 60)); 894 hs_page2->seconds_since1970 = local_time; 895 hs_header->checksum = mvumi_calculate_checksum(hs_header, 896 hs_header->frame_length); 897 break; 898 899 case HS_PAGE_FIRM_CTL: 900 hs_page3 = (struct mvumi_hs_page3 *) hs_header; 901 hs_header->frame_length = sizeof(*hs_page3) - 4; 902 memset(hs_header->frame_content, 0, hs_header->frame_length); 903 hs_header->checksum = mvumi_calculate_checksum(hs_header, 904 hs_header->frame_length); 905 break; 906 907 case HS_PAGE_CL_INFO: 908 hs_page4 = (struct mvumi_hs_page4 *) hs_header; 909 hs_header->frame_length = sizeof(*hs_page4) - 4; 910 memset(hs_header->frame_content, 0, hs_header->frame_length); 911 hs_page4->ib_baseaddr_l = lower_32_bits(mhba->ib_list_phys); 912 hs_page4->ib_baseaddr_h = upper_32_bits(mhba->ib_list_phys); 913 914 hs_page4->ob_baseaddr_l = lower_32_bits(mhba->ob_list_phys); 915 hs_page4->ob_baseaddr_h = upper_32_bits(mhba->ob_list_phys); 916 hs_page4->ib_entry_size = mhba->ib_max_size_setting; 917 hs_page4->ob_entry_size = mhba->ob_max_size_setting; 918 if (mhba->hba_capability 919 & HS_CAPABILITY_NEW_PAGE_IO_DEPTH_DEF) { 920 hs_page4->ob_depth = find_first_bit((unsigned long *) 921 &mhba->list_num_io, 922 BITS_PER_LONG); 923 hs_page4->ib_depth = find_first_bit((unsigned long *) 924 &mhba->list_num_io, 925 BITS_PER_LONG); 926 } else { 927 hs_page4->ob_depth = (u8) mhba->list_num_io; 928 hs_page4->ib_depth = (u8) mhba->list_num_io; 929 } 930 hs_header->checksum = mvumi_calculate_checksum(hs_header, 931 hs_header->frame_length); 932 break; 933 934 default: 935 dev_err(&mhba->pdev->dev, "cannot build page, code[0x%x]\n", 936 hs_header->page_code); 937 break; 938 } 939 } 940 941 /** 942 * mvumi_init_data - Initialize requested date for FW 943 * @mhba: Adapter soft state 944 */ 945 static int mvumi_init_data(struct mvumi_hba *mhba) 946 { 947 struct mvumi_ob_data *ob_pool; 948 struct mvumi_res *res_mgnt; 949 unsigned int tmp_size, offset, i; 950 void *virmem, *v; 951 dma_addr_t p; 952 953 if (mhba->fw_flag & MVUMI_FW_ALLOC) 954 return 0; 955 956 tmp_size = mhba->ib_max_size * mhba->max_io; 957 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) 958 tmp_size += sizeof(struct mvumi_dyn_list_entry) * mhba->max_io; 959 960 tmp_size += 128 + mhba->ob_max_size * mhba->max_io; 961 tmp_size += 8 + sizeof(u32)*2 + 16; 962 963 res_mgnt = mvumi_alloc_mem_resource(mhba, 964 RESOURCE_UNCACHED_MEMORY, tmp_size); 965 if (!res_mgnt) { 966 dev_err(&mhba->pdev->dev, 967 "failed to allocate memory for inbound list\n"); 968 goto fail_alloc_dma_buf; 969 } 970 971 p = res_mgnt->bus_addr; 972 v = res_mgnt->virt_addr; 973 /* ib_list */ 974 offset = round_up(p, 128) - p; 975 p += offset; 976 v += offset; 977 mhba->ib_list = v; 978 mhba->ib_list_phys = p; 979 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 980 v += sizeof(struct mvumi_dyn_list_entry) * mhba->max_io; 981 p += sizeof(struct mvumi_dyn_list_entry) * mhba->max_io; 982 mhba->ib_frame = v; 983 mhba->ib_frame_phys = p; 984 } 985 v += mhba->ib_max_size * mhba->max_io; 986 p += mhba->ib_max_size * mhba->max_io; 987 988 /* ib shadow */ 989 offset = round_up(p, 8) - p; 990 p += offset; 991 v += offset; 992 mhba->ib_shadow = v; 993 mhba->ib_shadow_phys = p; 994 p += sizeof(u32)*2; 995 v += sizeof(u32)*2; 996 /* ob shadow */ 997 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) { 998 offset = round_up(p, 8) - p; 999 p += offset; 1000 v += offset; 1001 mhba->ob_shadow = v; 1002 mhba->ob_shadow_phys = p; 1003 p += 8; 1004 v += 8; 1005 } else { 1006 offset = round_up(p, 4) - p; 1007 p += offset; 1008 v += offset; 1009 mhba->ob_shadow = v; 1010 mhba->ob_shadow_phys = p; 1011 p += 4; 1012 v += 4; 1013 } 1014 1015 /* ob list */ 1016 offset = round_up(p, 128) - p; 1017 p += offset; 1018 v += offset; 1019 1020 mhba->ob_list = v; 1021 mhba->ob_list_phys = p; 1022 1023 /* ob data pool */ 1024 tmp_size = mhba->max_io * (mhba->ob_max_size + sizeof(*ob_pool)); 1025 tmp_size = round_up(tmp_size, 8); 1026 1027 res_mgnt = mvumi_alloc_mem_resource(mhba, 1028 RESOURCE_CACHED_MEMORY, tmp_size); 1029 if (!res_mgnt) { 1030 dev_err(&mhba->pdev->dev, 1031 "failed to allocate memory for outbound data buffer\n"); 1032 goto fail_alloc_dma_buf; 1033 } 1034 virmem = res_mgnt->virt_addr; 1035 1036 for (i = mhba->max_io; i != 0; i--) { 1037 ob_pool = (struct mvumi_ob_data *) virmem; 1038 list_add_tail(&ob_pool->list, &mhba->ob_data_list); 1039 virmem += mhba->ob_max_size + sizeof(*ob_pool); 1040 } 1041 1042 tmp_size = sizeof(unsigned short) * mhba->max_io + 1043 sizeof(struct mvumi_cmd *) * mhba->max_io; 1044 tmp_size += round_up(mhba->max_target_id, sizeof(unsigned char) * 8) / 1045 (sizeof(unsigned char) * 8); 1046 1047 res_mgnt = mvumi_alloc_mem_resource(mhba, 1048 RESOURCE_CACHED_MEMORY, tmp_size); 1049 if (!res_mgnt) { 1050 dev_err(&mhba->pdev->dev, 1051 "failed to allocate memory for tag and target map\n"); 1052 goto fail_alloc_dma_buf; 1053 } 1054 1055 virmem = res_mgnt->virt_addr; 1056 mhba->tag_pool.stack = virmem; 1057 mhba->tag_pool.size = mhba->max_io; 1058 tag_init(&mhba->tag_pool, mhba->max_io); 1059 virmem += sizeof(unsigned short) * mhba->max_io; 1060 1061 mhba->tag_cmd = virmem; 1062 virmem += sizeof(struct mvumi_cmd *) * mhba->max_io; 1063 1064 mhba->target_map = virmem; 1065 1066 mhba->fw_flag |= MVUMI_FW_ALLOC; 1067 return 0; 1068 1069 fail_alloc_dma_buf: 1070 mvumi_release_mem_resource(mhba); 1071 return -1; 1072 } 1073 1074 static int mvumi_hs_process_page(struct mvumi_hba *mhba, 1075 struct mvumi_hs_header *hs_header) 1076 { 1077 struct mvumi_hs_page1 *hs_page1; 1078 unsigned char page_checksum; 1079 1080 page_checksum = mvumi_calculate_checksum(hs_header, 1081 hs_header->frame_length); 1082 if (page_checksum != hs_header->checksum) { 1083 dev_err(&mhba->pdev->dev, "checksum error\n"); 1084 return -1; 1085 } 1086 1087 switch (hs_header->page_code) { 1088 case HS_PAGE_FIRM_CAP: 1089 hs_page1 = (struct mvumi_hs_page1 *) hs_header; 1090 1091 mhba->max_io = hs_page1->max_io_support; 1092 mhba->list_num_io = hs_page1->cl_inout_list_depth; 1093 mhba->max_transfer_size = hs_page1->max_transfer_size; 1094 mhba->max_target_id = hs_page1->max_devices_support; 1095 mhba->hba_capability = hs_page1->capability; 1096 mhba->ib_max_size_setting = hs_page1->cl_in_max_entry_size; 1097 mhba->ib_max_size = (1 << hs_page1->cl_in_max_entry_size) << 2; 1098 1099 mhba->ob_max_size_setting = hs_page1->cl_out_max_entry_size; 1100 mhba->ob_max_size = (1 << hs_page1->cl_out_max_entry_size) << 2; 1101 1102 dev_dbg(&mhba->pdev->dev, "FW version:%d\n", 1103 hs_page1->fw_ver.ver_build); 1104 1105 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_COMPACT_SG) 1106 mhba->eot_flag = 22; 1107 else 1108 mhba->eot_flag = 27; 1109 if (mhba->hba_capability & HS_CAPABILITY_NEW_PAGE_IO_DEPTH_DEF) 1110 mhba->list_num_io = 1 << hs_page1->cl_inout_list_depth; 1111 break; 1112 default: 1113 dev_err(&mhba->pdev->dev, "handshake: page code error\n"); 1114 return -1; 1115 } 1116 return 0; 1117 } 1118 1119 /** 1120 * mvumi_handshake - Move the FW to READY state 1121 * @mhba: Adapter soft state 1122 * 1123 * During the initialization, FW passes can potentially be in any one of 1124 * several possible states. If the FW in operational, waiting-for-handshake 1125 * states, driver must take steps to bring it to ready state. Otherwise, it 1126 * has to wait for the ready state. 1127 */ 1128 static int mvumi_handshake(struct mvumi_hba *mhba) 1129 { 1130 unsigned int hs_state, tmp, hs_fun; 1131 struct mvumi_hs_header *hs_header; 1132 struct mvumi_hw_regs *regs = mhba->regs; 1133 1134 if (mhba->fw_state == FW_STATE_STARTING) 1135 hs_state = HS_S_START; 1136 else { 1137 tmp = ioread32(regs->arm_to_pciea_msg0); 1138 hs_state = HS_GET_STATE(tmp); 1139 dev_dbg(&mhba->pdev->dev, "handshake state[0x%x].\n", hs_state); 1140 if (HS_GET_STATUS(tmp) != HS_STATUS_OK) { 1141 mhba->fw_state = FW_STATE_STARTING; 1142 return -1; 1143 } 1144 } 1145 1146 hs_fun = 0; 1147 switch (hs_state) { 1148 case HS_S_START: 1149 mhba->fw_state = FW_STATE_HANDSHAKING; 1150 HS_SET_STATUS(hs_fun, HS_STATUS_OK); 1151 HS_SET_STATE(hs_fun, HS_S_RESET); 1152 iowrite32(HANDSHAKE_SIGNATURE, regs->pciea_to_arm_msg1); 1153 iowrite32(hs_fun, regs->pciea_to_arm_msg0); 1154 iowrite32(DRBL_HANDSHAKE, regs->pciea_to_arm_drbl_reg); 1155 break; 1156 1157 case HS_S_RESET: 1158 iowrite32(lower_32_bits(mhba->handshake_page_phys), 1159 regs->pciea_to_arm_msg1); 1160 iowrite32(upper_32_bits(mhba->handshake_page_phys), 1161 regs->arm_to_pciea_msg1); 1162 HS_SET_STATUS(hs_fun, HS_STATUS_OK); 1163 HS_SET_STATE(hs_fun, HS_S_PAGE_ADDR); 1164 iowrite32(hs_fun, regs->pciea_to_arm_msg0); 1165 iowrite32(DRBL_HANDSHAKE, regs->pciea_to_arm_drbl_reg); 1166 break; 1167 1168 case HS_S_PAGE_ADDR: 1169 case HS_S_QUERY_PAGE: 1170 case HS_S_SEND_PAGE: 1171 hs_header = (struct mvumi_hs_header *) mhba->handshake_page; 1172 if (hs_header->page_code == HS_PAGE_FIRM_CAP) { 1173 mhba->hba_total_pages = 1174 ((struct mvumi_hs_page1 *) hs_header)->total_pages; 1175 1176 if (mhba->hba_total_pages == 0) 1177 mhba->hba_total_pages = HS_PAGE_TOTAL-1; 1178 } 1179 1180 if (hs_state == HS_S_QUERY_PAGE) { 1181 if (mvumi_hs_process_page(mhba, hs_header)) { 1182 HS_SET_STATE(hs_fun, HS_S_ABORT); 1183 return -1; 1184 } 1185 if (mvumi_init_data(mhba)) { 1186 HS_SET_STATE(hs_fun, HS_S_ABORT); 1187 return -1; 1188 } 1189 } else if (hs_state == HS_S_PAGE_ADDR) { 1190 hs_header->page_code = 0; 1191 mhba->hba_total_pages = HS_PAGE_TOTAL-1; 1192 } 1193 1194 if ((hs_header->page_code + 1) <= mhba->hba_total_pages) { 1195 hs_header->page_code++; 1196 if (hs_header->page_code != HS_PAGE_FIRM_CAP) { 1197 mvumi_hs_build_page(mhba, hs_header); 1198 HS_SET_STATE(hs_fun, HS_S_SEND_PAGE); 1199 } else 1200 HS_SET_STATE(hs_fun, HS_S_QUERY_PAGE); 1201 } else 1202 HS_SET_STATE(hs_fun, HS_S_END); 1203 1204 HS_SET_STATUS(hs_fun, HS_STATUS_OK); 1205 iowrite32(hs_fun, regs->pciea_to_arm_msg0); 1206 iowrite32(DRBL_HANDSHAKE, regs->pciea_to_arm_drbl_reg); 1207 break; 1208 1209 case HS_S_END: 1210 /* Set communication list ISR */ 1211 tmp = ioread32(regs->enpointa_mask_reg); 1212 tmp |= regs->int_comaout | regs->int_comaerr; 1213 iowrite32(tmp, regs->enpointa_mask_reg); 1214 iowrite32(mhba->list_num_io, mhba->ib_shadow); 1215 /* Set InBound List Available count shadow */ 1216 iowrite32(lower_32_bits(mhba->ib_shadow_phys), 1217 regs->inb_aval_count_basel); 1218 iowrite32(upper_32_bits(mhba->ib_shadow_phys), 1219 regs->inb_aval_count_baseh); 1220 1221 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9143) { 1222 /* Set OutBound List Available count shadow */ 1223 iowrite32((mhba->list_num_io-1) | 1224 regs->cl_pointer_toggle, 1225 mhba->ob_shadow); 1226 iowrite32(lower_32_bits(mhba->ob_shadow_phys), 1227 regs->outb_copy_basel); 1228 iowrite32(upper_32_bits(mhba->ob_shadow_phys), 1229 regs->outb_copy_baseh); 1230 } 1231 1232 mhba->ib_cur_slot = (mhba->list_num_io - 1) | 1233 regs->cl_pointer_toggle; 1234 mhba->ob_cur_slot = (mhba->list_num_io - 1) | 1235 regs->cl_pointer_toggle; 1236 mhba->fw_state = FW_STATE_STARTED; 1237 1238 break; 1239 default: 1240 dev_err(&mhba->pdev->dev, "unknown handshake state [0x%x].\n", 1241 hs_state); 1242 return -1; 1243 } 1244 return 0; 1245 } 1246 1247 static unsigned char mvumi_handshake_event(struct mvumi_hba *mhba) 1248 { 1249 unsigned int isr_status; 1250 unsigned long before; 1251 1252 before = jiffies; 1253 mvumi_handshake(mhba); 1254 do { 1255 isr_status = mhba->instancet->read_fw_status_reg(mhba); 1256 1257 if (mhba->fw_state == FW_STATE_STARTED) 1258 return 0; 1259 if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) { 1260 dev_err(&mhba->pdev->dev, 1261 "no handshake response at state 0x%x.\n", 1262 mhba->fw_state); 1263 dev_err(&mhba->pdev->dev, 1264 "isr : global=0x%x,status=0x%x.\n", 1265 mhba->global_isr, isr_status); 1266 return -1; 1267 } 1268 rmb(); 1269 usleep_range(1000, 2000); 1270 } while (!(isr_status & DRBL_HANDSHAKE_ISR)); 1271 1272 return 0; 1273 } 1274 1275 static unsigned char mvumi_check_handshake(struct mvumi_hba *mhba) 1276 { 1277 unsigned int tmp; 1278 unsigned long before; 1279 1280 before = jiffies; 1281 tmp = ioread32(mhba->regs->arm_to_pciea_msg1); 1282 while ((tmp != HANDSHAKE_READYSTATE) && (tmp != HANDSHAKE_DONESTATE)) { 1283 if (tmp != HANDSHAKE_READYSTATE) 1284 iowrite32(DRBL_MU_RESET, 1285 mhba->regs->pciea_to_arm_drbl_reg); 1286 if (time_after(jiffies, before + FW_MAX_DELAY * HZ)) { 1287 dev_err(&mhba->pdev->dev, 1288 "invalid signature [0x%x].\n", tmp); 1289 return -1; 1290 } 1291 usleep_range(1000, 2000); 1292 rmb(); 1293 tmp = ioread32(mhba->regs->arm_to_pciea_msg1); 1294 } 1295 1296 mhba->fw_state = FW_STATE_STARTING; 1297 dev_dbg(&mhba->pdev->dev, "start firmware handshake...\n"); 1298 do { 1299 if (mvumi_handshake_event(mhba)) { 1300 dev_err(&mhba->pdev->dev, 1301 "handshake failed at state 0x%x.\n", 1302 mhba->fw_state); 1303 return -1; 1304 } 1305 } while (mhba->fw_state != FW_STATE_STARTED); 1306 1307 dev_dbg(&mhba->pdev->dev, "firmware handshake done\n"); 1308 1309 return 0; 1310 } 1311 1312 static unsigned char mvumi_start(struct mvumi_hba *mhba) 1313 { 1314 unsigned int tmp; 1315 struct mvumi_hw_regs *regs = mhba->regs; 1316 1317 /* clear Door bell */ 1318 tmp = ioread32(regs->arm_to_pciea_drbl_reg); 1319 iowrite32(tmp, regs->arm_to_pciea_drbl_reg); 1320 1321 iowrite32(regs->int_drbl_int_mask, regs->arm_to_pciea_mask_reg); 1322 tmp = ioread32(regs->enpointa_mask_reg) | regs->int_dl_cpu2pciea; 1323 iowrite32(tmp, regs->enpointa_mask_reg); 1324 msleep(100); 1325 if (mvumi_check_handshake(mhba)) 1326 return -1; 1327 1328 return 0; 1329 } 1330 1331 /** 1332 * mvumi_complete_cmd - Completes a command 1333 * @mhba: Adapter soft state 1334 * @cmd: Command to be completed 1335 */ 1336 static void mvumi_complete_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd, 1337 struct mvumi_rsp_frame *ob_frame) 1338 { 1339 struct scsi_cmnd *scmd = cmd->scmd; 1340 1341 cmd->scmd->SCp.ptr = NULL; 1342 scmd->result = ob_frame->req_status; 1343 1344 switch (ob_frame->req_status) { 1345 case SAM_STAT_GOOD: 1346 scmd->result |= DID_OK << 16; 1347 break; 1348 case SAM_STAT_BUSY: 1349 scmd->result |= DID_BUS_BUSY << 16; 1350 break; 1351 case SAM_STAT_CHECK_CONDITION: 1352 scmd->result |= (DID_OK << 16); 1353 if (ob_frame->rsp_flag & CL_RSP_FLAG_SENSEDATA) { 1354 memcpy(cmd->scmd->sense_buffer, ob_frame->payload, 1355 sizeof(struct mvumi_sense_data)); 1356 scmd->result |= (DRIVER_SENSE << 24); 1357 } 1358 break; 1359 default: 1360 scmd->result |= (DRIVER_INVALID << 24) | (DID_ABORT << 16); 1361 break; 1362 } 1363 1364 if (scsi_bufflen(scmd)) { 1365 if (scsi_sg_count(scmd)) { 1366 pci_unmap_sg(mhba->pdev, 1367 scsi_sglist(scmd), 1368 scsi_sg_count(scmd), 1369 (int) scmd->sc_data_direction); 1370 } else { 1371 pci_unmap_single(mhba->pdev, 1372 scmd->SCp.dma_handle, 1373 scsi_bufflen(scmd), 1374 (int) scmd->sc_data_direction); 1375 1376 scmd->SCp.dma_handle = 0; 1377 } 1378 } 1379 cmd->scmd->scsi_done(scmd); 1380 mvumi_return_cmd(mhba, cmd); 1381 } 1382 1383 static void mvumi_complete_internal_cmd(struct mvumi_hba *mhba, 1384 struct mvumi_cmd *cmd, 1385 struct mvumi_rsp_frame *ob_frame) 1386 { 1387 if (atomic_read(&cmd->sync_cmd)) { 1388 cmd->cmd_status = ob_frame->req_status; 1389 1390 if ((ob_frame->req_status == SAM_STAT_CHECK_CONDITION) && 1391 (ob_frame->rsp_flag & CL_RSP_FLAG_SENSEDATA) && 1392 cmd->data_buf) { 1393 memcpy(cmd->data_buf, ob_frame->payload, 1394 sizeof(struct mvumi_sense_data)); 1395 } 1396 atomic_dec(&cmd->sync_cmd); 1397 wake_up(&mhba->int_cmd_wait_q); 1398 } 1399 } 1400 1401 static void mvumi_show_event(struct mvumi_hba *mhba, 1402 struct mvumi_driver_event *ptr) 1403 { 1404 unsigned int i; 1405 1406 dev_warn(&mhba->pdev->dev, 1407 "Event[0x%x] id[0x%x] severity[0x%x] device id[0x%x]\n", 1408 ptr->sequence_no, ptr->event_id, ptr->severity, ptr->device_id); 1409 if (ptr->param_count) { 1410 printk(KERN_WARNING "Event param(len 0x%x): ", 1411 ptr->param_count); 1412 for (i = 0; i < ptr->param_count; i++) 1413 printk(KERN_WARNING "0x%x ", ptr->params[i]); 1414 1415 printk(KERN_WARNING "\n"); 1416 } 1417 1418 if (ptr->sense_data_length) { 1419 printk(KERN_WARNING "Event sense data(len 0x%x): ", 1420 ptr->sense_data_length); 1421 for (i = 0; i < ptr->sense_data_length; i++) 1422 printk(KERN_WARNING "0x%x ", ptr->sense_data[i]); 1423 printk(KERN_WARNING "\n"); 1424 } 1425 } 1426 1427 static int mvumi_handle_hotplug(struct mvumi_hba *mhba, u16 devid, int status) 1428 { 1429 struct scsi_device *sdev; 1430 int ret = -1; 1431 1432 if (status == DEVICE_OFFLINE) { 1433 sdev = scsi_device_lookup(mhba->shost, 0, devid, 0); 1434 if (sdev) { 1435 dev_dbg(&mhba->pdev->dev, "remove disk %d-%d-%d.\n", 0, 1436 sdev->id, 0); 1437 scsi_remove_device(sdev); 1438 scsi_device_put(sdev); 1439 ret = 0; 1440 } else 1441 dev_err(&mhba->pdev->dev, " no disk[%d] to remove\n", 1442 devid); 1443 } else if (status == DEVICE_ONLINE) { 1444 sdev = scsi_device_lookup(mhba->shost, 0, devid, 0); 1445 if (!sdev) { 1446 scsi_add_device(mhba->shost, 0, devid, 0); 1447 dev_dbg(&mhba->pdev->dev, " add disk %d-%d-%d.\n", 0, 1448 devid, 0); 1449 ret = 0; 1450 } else { 1451 dev_err(&mhba->pdev->dev, " don't add disk %d-%d-%d.\n", 1452 0, devid, 0); 1453 scsi_device_put(sdev); 1454 } 1455 } 1456 return ret; 1457 } 1458 1459 static u64 mvumi_inquiry(struct mvumi_hba *mhba, 1460 unsigned int id, struct mvumi_cmd *cmd) 1461 { 1462 struct mvumi_msg_frame *frame; 1463 u64 wwid = 0; 1464 int cmd_alloc = 0; 1465 int data_buf_len = 64; 1466 1467 if (!cmd) { 1468 cmd = mvumi_create_internal_cmd(mhba, data_buf_len); 1469 if (cmd) 1470 cmd_alloc = 1; 1471 else 1472 return 0; 1473 } else { 1474 memset(cmd->data_buf, 0, data_buf_len); 1475 } 1476 cmd->scmd = NULL; 1477 cmd->cmd_status = REQ_STATUS_PENDING; 1478 atomic_set(&cmd->sync_cmd, 0); 1479 frame = cmd->frame; 1480 frame->device_id = (u16) id; 1481 frame->cmd_flag = CMD_FLAG_DATA_IN; 1482 frame->req_function = CL_FUN_SCSI_CMD; 1483 frame->cdb_length = 6; 1484 frame->data_transfer_length = MVUMI_INQUIRY_LENGTH; 1485 memset(frame->cdb, 0, frame->cdb_length); 1486 frame->cdb[0] = INQUIRY; 1487 frame->cdb[4] = frame->data_transfer_length; 1488 1489 mvumi_issue_blocked_cmd(mhba, cmd); 1490 1491 if (cmd->cmd_status == SAM_STAT_GOOD) { 1492 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9143) 1493 wwid = id + 1; 1494 else 1495 memcpy((void *)&wwid, 1496 (cmd->data_buf + MVUMI_INQUIRY_UUID_OFF), 1497 MVUMI_INQUIRY_UUID_LEN); 1498 dev_dbg(&mhba->pdev->dev, 1499 "inquiry device(0:%d:0) wwid(%llx)\n", id, wwid); 1500 } else { 1501 wwid = 0; 1502 } 1503 if (cmd_alloc) 1504 mvumi_delete_internal_cmd(mhba, cmd); 1505 1506 return wwid; 1507 } 1508 1509 static void mvumi_detach_devices(struct mvumi_hba *mhba) 1510 { 1511 struct mvumi_device *mv_dev = NULL , *dev_next; 1512 struct scsi_device *sdev = NULL; 1513 1514 mutex_lock(&mhba->device_lock); 1515 1516 /* detach Hard Disk */ 1517 list_for_each_entry_safe(mv_dev, dev_next, 1518 &mhba->shost_dev_list, list) { 1519 mvumi_handle_hotplug(mhba, mv_dev->id, DEVICE_OFFLINE); 1520 list_del_init(&mv_dev->list); 1521 dev_dbg(&mhba->pdev->dev, "release device(0:%d:0) wwid(%llx)\n", 1522 mv_dev->id, mv_dev->wwid); 1523 kfree(mv_dev); 1524 } 1525 list_for_each_entry_safe(mv_dev, dev_next, &mhba->mhba_dev_list, list) { 1526 list_del_init(&mv_dev->list); 1527 dev_dbg(&mhba->pdev->dev, "release device(0:%d:0) wwid(%llx)\n", 1528 mv_dev->id, mv_dev->wwid); 1529 kfree(mv_dev); 1530 } 1531 1532 /* detach virtual device */ 1533 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) 1534 sdev = scsi_device_lookup(mhba->shost, 0, 1535 mhba->max_target_id - 1, 0); 1536 1537 if (sdev) { 1538 scsi_remove_device(sdev); 1539 scsi_device_put(sdev); 1540 } 1541 1542 mutex_unlock(&mhba->device_lock); 1543 } 1544 1545 static void mvumi_rescan_devices(struct mvumi_hba *mhba, int id) 1546 { 1547 struct scsi_device *sdev; 1548 1549 sdev = scsi_device_lookup(mhba->shost, 0, id, 0); 1550 if (sdev) { 1551 scsi_rescan_device(&sdev->sdev_gendev); 1552 scsi_device_put(sdev); 1553 } 1554 } 1555 1556 static int mvumi_match_devices(struct mvumi_hba *mhba, int id, u64 wwid) 1557 { 1558 struct mvumi_device *mv_dev = NULL; 1559 1560 list_for_each_entry(mv_dev, &mhba->shost_dev_list, list) { 1561 if (mv_dev->wwid == wwid) { 1562 if (mv_dev->id != id) { 1563 dev_err(&mhba->pdev->dev, 1564 "%s has same wwid[%llx] ," 1565 " but different id[%d %d]\n", 1566 __func__, mv_dev->wwid, mv_dev->id, id); 1567 return -1; 1568 } else { 1569 if (mhba->pdev->device == 1570 PCI_DEVICE_ID_MARVELL_MV9143) 1571 mvumi_rescan_devices(mhba, id); 1572 return 1; 1573 } 1574 } 1575 } 1576 return 0; 1577 } 1578 1579 static void mvumi_remove_devices(struct mvumi_hba *mhba, int id) 1580 { 1581 struct mvumi_device *mv_dev = NULL, *dev_next; 1582 1583 list_for_each_entry_safe(mv_dev, dev_next, 1584 &mhba->shost_dev_list, list) { 1585 if (mv_dev->id == id) { 1586 dev_dbg(&mhba->pdev->dev, 1587 "detach device(0:%d:0) wwid(%llx) from HOST\n", 1588 mv_dev->id, mv_dev->wwid); 1589 mvumi_handle_hotplug(mhba, mv_dev->id, DEVICE_OFFLINE); 1590 list_del_init(&mv_dev->list); 1591 kfree(mv_dev); 1592 } 1593 } 1594 } 1595 1596 static int mvumi_probe_devices(struct mvumi_hba *mhba) 1597 { 1598 int id, maxid; 1599 u64 wwid = 0; 1600 struct mvumi_device *mv_dev = NULL; 1601 struct mvumi_cmd *cmd = NULL; 1602 int found = 0; 1603 1604 cmd = mvumi_create_internal_cmd(mhba, 64); 1605 if (!cmd) 1606 return -1; 1607 1608 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9143) 1609 maxid = mhba->max_target_id; 1610 else 1611 maxid = mhba->max_target_id - 1; 1612 1613 for (id = 0; id < maxid; id++) { 1614 wwid = mvumi_inquiry(mhba, id, cmd); 1615 if (!wwid) { 1616 /* device no response, remove it */ 1617 mvumi_remove_devices(mhba, id); 1618 } else { 1619 /* device response, add it */ 1620 found = mvumi_match_devices(mhba, id, wwid); 1621 if (!found) { 1622 mvumi_remove_devices(mhba, id); 1623 mv_dev = kzalloc(sizeof(struct mvumi_device), 1624 GFP_KERNEL); 1625 if (!mv_dev) { 1626 dev_err(&mhba->pdev->dev, 1627 "%s alloc mv_dev failed\n", 1628 __func__); 1629 continue; 1630 } 1631 mv_dev->id = id; 1632 mv_dev->wwid = wwid; 1633 mv_dev->sdev = NULL; 1634 INIT_LIST_HEAD(&mv_dev->list); 1635 list_add_tail(&mv_dev->list, 1636 &mhba->mhba_dev_list); 1637 dev_dbg(&mhba->pdev->dev, 1638 "probe a new device(0:%d:0)" 1639 " wwid(%llx)\n", id, mv_dev->wwid); 1640 } else if (found == -1) 1641 return -1; 1642 else 1643 continue; 1644 } 1645 } 1646 1647 if (cmd) 1648 mvumi_delete_internal_cmd(mhba, cmd); 1649 1650 return 0; 1651 } 1652 1653 static int mvumi_rescan_bus(void *data) 1654 { 1655 int ret = 0; 1656 struct mvumi_hba *mhba = (struct mvumi_hba *) data; 1657 struct mvumi_device *mv_dev = NULL , *dev_next; 1658 1659 while (!kthread_should_stop()) { 1660 1661 set_current_state(TASK_INTERRUPTIBLE); 1662 if (!atomic_read(&mhba->pnp_count)) 1663 schedule(); 1664 msleep(1000); 1665 atomic_set(&mhba->pnp_count, 0); 1666 __set_current_state(TASK_RUNNING); 1667 1668 mutex_lock(&mhba->device_lock); 1669 ret = mvumi_probe_devices(mhba); 1670 if (!ret) { 1671 list_for_each_entry_safe(mv_dev, dev_next, 1672 &mhba->mhba_dev_list, list) { 1673 if (mvumi_handle_hotplug(mhba, mv_dev->id, 1674 DEVICE_ONLINE)) { 1675 dev_err(&mhba->pdev->dev, 1676 "%s add device(0:%d:0) failed" 1677 "wwid(%llx) has exist\n", 1678 __func__, 1679 mv_dev->id, mv_dev->wwid); 1680 list_del_init(&mv_dev->list); 1681 kfree(mv_dev); 1682 } else { 1683 list_move_tail(&mv_dev->list, 1684 &mhba->shost_dev_list); 1685 } 1686 } 1687 } 1688 mutex_unlock(&mhba->device_lock); 1689 } 1690 return 0; 1691 } 1692 1693 static void mvumi_proc_msg(struct mvumi_hba *mhba, 1694 struct mvumi_hotplug_event *param) 1695 { 1696 u16 size = param->size; 1697 const unsigned long *ar_bitmap; 1698 const unsigned long *re_bitmap; 1699 int index; 1700 1701 if (mhba->fw_flag & MVUMI_FW_ATTACH) { 1702 index = -1; 1703 ar_bitmap = (const unsigned long *) param->bitmap; 1704 re_bitmap = (const unsigned long *) &param->bitmap[size >> 3]; 1705 1706 mutex_lock(&mhba->sas_discovery_mutex); 1707 do { 1708 index = find_next_zero_bit(ar_bitmap, size, index + 1); 1709 if (index >= size) 1710 break; 1711 mvumi_handle_hotplug(mhba, index, DEVICE_ONLINE); 1712 } while (1); 1713 1714 index = -1; 1715 do { 1716 index = find_next_zero_bit(re_bitmap, size, index + 1); 1717 if (index >= size) 1718 break; 1719 mvumi_handle_hotplug(mhba, index, DEVICE_OFFLINE); 1720 } while (1); 1721 mutex_unlock(&mhba->sas_discovery_mutex); 1722 } 1723 } 1724 1725 static void mvumi_notification(struct mvumi_hba *mhba, u8 msg, void *buffer) 1726 { 1727 if (msg == APICDB1_EVENT_GETEVENT) { 1728 int i, count; 1729 struct mvumi_driver_event *param = NULL; 1730 struct mvumi_event_req *er = buffer; 1731 count = er->count; 1732 if (count > MAX_EVENTS_RETURNED) { 1733 dev_err(&mhba->pdev->dev, "event count[0x%x] is bigger" 1734 " than max event count[0x%x].\n", 1735 count, MAX_EVENTS_RETURNED); 1736 return; 1737 } 1738 for (i = 0; i < count; i++) { 1739 param = &er->events[i]; 1740 mvumi_show_event(mhba, param); 1741 } 1742 } else if (msg == APICDB1_HOST_GETEVENT) { 1743 mvumi_proc_msg(mhba, buffer); 1744 } 1745 } 1746 1747 static int mvumi_get_event(struct mvumi_hba *mhba, unsigned char msg) 1748 { 1749 struct mvumi_cmd *cmd; 1750 struct mvumi_msg_frame *frame; 1751 1752 cmd = mvumi_create_internal_cmd(mhba, 512); 1753 if (!cmd) 1754 return -1; 1755 cmd->scmd = NULL; 1756 cmd->cmd_status = REQ_STATUS_PENDING; 1757 atomic_set(&cmd->sync_cmd, 0); 1758 frame = cmd->frame; 1759 frame->device_id = 0; 1760 frame->cmd_flag = CMD_FLAG_DATA_IN; 1761 frame->req_function = CL_FUN_SCSI_CMD; 1762 frame->cdb_length = MAX_COMMAND_SIZE; 1763 frame->data_transfer_length = sizeof(struct mvumi_event_req); 1764 memset(frame->cdb, 0, MAX_COMMAND_SIZE); 1765 frame->cdb[0] = APICDB0_EVENT; 1766 frame->cdb[1] = msg; 1767 mvumi_issue_blocked_cmd(mhba, cmd); 1768 1769 if (cmd->cmd_status != SAM_STAT_GOOD) 1770 dev_err(&mhba->pdev->dev, "get event failed, status=0x%x.\n", 1771 cmd->cmd_status); 1772 else 1773 mvumi_notification(mhba, cmd->frame->cdb[1], cmd->data_buf); 1774 1775 mvumi_delete_internal_cmd(mhba, cmd); 1776 return 0; 1777 } 1778 1779 static void mvumi_scan_events(struct work_struct *work) 1780 { 1781 struct mvumi_events_wq *mu_ev = 1782 container_of(work, struct mvumi_events_wq, work_q); 1783 1784 mvumi_get_event(mu_ev->mhba, mu_ev->event); 1785 kfree(mu_ev); 1786 } 1787 1788 static void mvumi_launch_events(struct mvumi_hba *mhba, u32 isr_status) 1789 { 1790 struct mvumi_events_wq *mu_ev; 1791 1792 while (isr_status & (DRBL_BUS_CHANGE | DRBL_EVENT_NOTIFY)) { 1793 if (isr_status & DRBL_BUS_CHANGE) { 1794 atomic_inc(&mhba->pnp_count); 1795 wake_up_process(mhba->dm_thread); 1796 isr_status &= ~(DRBL_BUS_CHANGE); 1797 continue; 1798 } 1799 1800 mu_ev = kzalloc(sizeof(*mu_ev), GFP_ATOMIC); 1801 if (mu_ev) { 1802 INIT_WORK(&mu_ev->work_q, mvumi_scan_events); 1803 mu_ev->mhba = mhba; 1804 mu_ev->event = APICDB1_EVENT_GETEVENT; 1805 isr_status &= ~(DRBL_EVENT_NOTIFY); 1806 mu_ev->param = NULL; 1807 schedule_work(&mu_ev->work_q); 1808 } 1809 } 1810 } 1811 1812 static void mvumi_handle_clob(struct mvumi_hba *mhba) 1813 { 1814 struct mvumi_rsp_frame *ob_frame; 1815 struct mvumi_cmd *cmd; 1816 struct mvumi_ob_data *pool; 1817 1818 while (!list_empty(&mhba->free_ob_list)) { 1819 pool = list_first_entry(&mhba->free_ob_list, 1820 struct mvumi_ob_data, list); 1821 list_del_init(&pool->list); 1822 list_add_tail(&pool->list, &mhba->ob_data_list); 1823 1824 ob_frame = (struct mvumi_rsp_frame *) &pool->data[0]; 1825 cmd = mhba->tag_cmd[ob_frame->tag]; 1826 1827 atomic_dec(&mhba->fw_outstanding); 1828 mhba->tag_cmd[ob_frame->tag] = 0; 1829 tag_release_one(mhba, &mhba->tag_pool, ob_frame->tag); 1830 if (cmd->scmd) 1831 mvumi_complete_cmd(mhba, cmd, ob_frame); 1832 else 1833 mvumi_complete_internal_cmd(mhba, cmd, ob_frame); 1834 } 1835 mhba->instancet->fire_cmd(mhba, NULL); 1836 } 1837 1838 static irqreturn_t mvumi_isr_handler(int irq, void *devp) 1839 { 1840 struct mvumi_hba *mhba = (struct mvumi_hba *) devp; 1841 unsigned long flags; 1842 1843 spin_lock_irqsave(mhba->shost->host_lock, flags); 1844 if (unlikely(mhba->instancet->clear_intr(mhba) || !mhba->global_isr)) { 1845 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 1846 return IRQ_NONE; 1847 } 1848 1849 if (mhba->global_isr & mhba->regs->int_dl_cpu2pciea) { 1850 if (mhba->isr_status & (DRBL_BUS_CHANGE | DRBL_EVENT_NOTIFY)) 1851 mvumi_launch_events(mhba, mhba->isr_status); 1852 if (mhba->isr_status & DRBL_HANDSHAKE_ISR) { 1853 dev_warn(&mhba->pdev->dev, "enter handshake again!\n"); 1854 mvumi_handshake(mhba); 1855 } 1856 1857 } 1858 1859 if (mhba->global_isr & mhba->regs->int_comaout) 1860 mvumi_receive_ob_list_entry(mhba); 1861 1862 mhba->global_isr = 0; 1863 mhba->isr_status = 0; 1864 if (mhba->fw_state == FW_STATE_STARTED) 1865 mvumi_handle_clob(mhba); 1866 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 1867 return IRQ_HANDLED; 1868 } 1869 1870 static enum mvumi_qc_result mvumi_send_command(struct mvumi_hba *mhba, 1871 struct mvumi_cmd *cmd) 1872 { 1873 void *ib_entry; 1874 struct mvumi_msg_frame *ib_frame; 1875 unsigned int frame_len; 1876 1877 ib_frame = cmd->frame; 1878 if (unlikely(mhba->fw_state != FW_STATE_STARTED)) { 1879 dev_dbg(&mhba->pdev->dev, "firmware not ready.\n"); 1880 return MV_QUEUE_COMMAND_RESULT_NO_RESOURCE; 1881 } 1882 if (tag_is_empty(&mhba->tag_pool)) { 1883 dev_dbg(&mhba->pdev->dev, "no free tag.\n"); 1884 return MV_QUEUE_COMMAND_RESULT_NO_RESOURCE; 1885 } 1886 mvumi_get_ib_list_entry(mhba, &ib_entry); 1887 1888 cmd->frame->tag = tag_get_one(mhba, &mhba->tag_pool); 1889 cmd->frame->request_id = mhba->io_seq++; 1890 cmd->request_id = cmd->frame->request_id; 1891 mhba->tag_cmd[cmd->frame->tag] = cmd; 1892 frame_len = sizeof(*ib_frame) - 4 + 1893 ib_frame->sg_counts * sizeof(struct mvumi_sgl); 1894 if (mhba->hba_capability & HS_CAPABILITY_SUPPORT_DYN_SRC) { 1895 struct mvumi_dyn_list_entry *dle; 1896 dle = ib_entry; 1897 dle->src_low_addr = 1898 cpu_to_le32(lower_32_bits(cmd->frame_phys)); 1899 dle->src_high_addr = 1900 cpu_to_le32(upper_32_bits(cmd->frame_phys)); 1901 dle->if_length = (frame_len >> 2) & 0xFFF; 1902 } else { 1903 memcpy(ib_entry, ib_frame, frame_len); 1904 } 1905 return MV_QUEUE_COMMAND_RESULT_SENT; 1906 } 1907 1908 static void mvumi_fire_cmd(struct mvumi_hba *mhba, struct mvumi_cmd *cmd) 1909 { 1910 unsigned short num_of_cl_sent = 0; 1911 unsigned int count; 1912 enum mvumi_qc_result result; 1913 1914 if (cmd) 1915 list_add_tail(&cmd->queue_pointer, &mhba->waiting_req_list); 1916 count = mhba->instancet->check_ib_list(mhba); 1917 if (list_empty(&mhba->waiting_req_list) || !count) 1918 return; 1919 1920 do { 1921 cmd = list_first_entry(&mhba->waiting_req_list, 1922 struct mvumi_cmd, queue_pointer); 1923 list_del_init(&cmd->queue_pointer); 1924 result = mvumi_send_command(mhba, cmd); 1925 switch (result) { 1926 case MV_QUEUE_COMMAND_RESULT_SENT: 1927 num_of_cl_sent++; 1928 break; 1929 case MV_QUEUE_COMMAND_RESULT_NO_RESOURCE: 1930 list_add(&cmd->queue_pointer, &mhba->waiting_req_list); 1931 if (num_of_cl_sent > 0) 1932 mvumi_send_ib_list_entry(mhba); 1933 1934 return; 1935 } 1936 } while (!list_empty(&mhba->waiting_req_list) && count--); 1937 1938 if (num_of_cl_sent > 0) 1939 mvumi_send_ib_list_entry(mhba); 1940 } 1941 1942 /** 1943 * mvumi_enable_intr - Enables interrupts 1944 * @mhba: Adapter soft state 1945 */ 1946 static void mvumi_enable_intr(struct mvumi_hba *mhba) 1947 { 1948 unsigned int mask; 1949 struct mvumi_hw_regs *regs = mhba->regs; 1950 1951 iowrite32(regs->int_drbl_int_mask, regs->arm_to_pciea_mask_reg); 1952 mask = ioread32(regs->enpointa_mask_reg); 1953 mask |= regs->int_dl_cpu2pciea | regs->int_comaout | regs->int_comaerr; 1954 iowrite32(mask, regs->enpointa_mask_reg); 1955 } 1956 1957 /** 1958 * mvumi_disable_intr -Disables interrupt 1959 * @mhba: Adapter soft state 1960 */ 1961 static void mvumi_disable_intr(struct mvumi_hba *mhba) 1962 { 1963 unsigned int mask; 1964 struct mvumi_hw_regs *regs = mhba->regs; 1965 1966 iowrite32(0, regs->arm_to_pciea_mask_reg); 1967 mask = ioread32(regs->enpointa_mask_reg); 1968 mask &= ~(regs->int_dl_cpu2pciea | regs->int_comaout | 1969 regs->int_comaerr); 1970 iowrite32(mask, regs->enpointa_mask_reg); 1971 } 1972 1973 static int mvumi_clear_intr(void *extend) 1974 { 1975 struct mvumi_hba *mhba = (struct mvumi_hba *) extend; 1976 unsigned int status, isr_status = 0, tmp = 0; 1977 struct mvumi_hw_regs *regs = mhba->regs; 1978 1979 status = ioread32(regs->main_int_cause_reg); 1980 if (!(status & regs->int_mu) || status == 0xFFFFFFFF) 1981 return 1; 1982 if (unlikely(status & regs->int_comaerr)) { 1983 tmp = ioread32(regs->outb_isr_cause); 1984 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) { 1985 if (tmp & regs->clic_out_err) { 1986 iowrite32(tmp & regs->clic_out_err, 1987 regs->outb_isr_cause); 1988 } 1989 } else { 1990 if (tmp & (regs->clic_in_err | regs->clic_out_err)) 1991 iowrite32(tmp & (regs->clic_in_err | 1992 regs->clic_out_err), 1993 regs->outb_isr_cause); 1994 } 1995 status ^= mhba->regs->int_comaerr; 1996 /* inbound or outbound parity error, command will timeout */ 1997 } 1998 if (status & regs->int_comaout) { 1999 tmp = ioread32(regs->outb_isr_cause); 2000 if (tmp & regs->clic_irq) 2001 iowrite32(tmp & regs->clic_irq, regs->outb_isr_cause); 2002 } 2003 if (status & regs->int_dl_cpu2pciea) { 2004 isr_status = ioread32(regs->arm_to_pciea_drbl_reg); 2005 if (isr_status) 2006 iowrite32(isr_status, regs->arm_to_pciea_drbl_reg); 2007 } 2008 2009 mhba->global_isr = status; 2010 mhba->isr_status = isr_status; 2011 2012 return 0; 2013 } 2014 2015 /** 2016 * mvumi_read_fw_status_reg - returns the current FW status value 2017 * @mhba: Adapter soft state 2018 */ 2019 static unsigned int mvumi_read_fw_status_reg(struct mvumi_hba *mhba) 2020 { 2021 unsigned int status; 2022 2023 status = ioread32(mhba->regs->arm_to_pciea_drbl_reg); 2024 if (status) 2025 iowrite32(status, mhba->regs->arm_to_pciea_drbl_reg); 2026 return status; 2027 } 2028 2029 static struct mvumi_instance_template mvumi_instance_9143 = { 2030 .fire_cmd = mvumi_fire_cmd, 2031 .enable_intr = mvumi_enable_intr, 2032 .disable_intr = mvumi_disable_intr, 2033 .clear_intr = mvumi_clear_intr, 2034 .read_fw_status_reg = mvumi_read_fw_status_reg, 2035 .check_ib_list = mvumi_check_ib_list_9143, 2036 .check_ob_list = mvumi_check_ob_list_9143, 2037 .reset_host = mvumi_reset_host_9143, 2038 }; 2039 2040 static struct mvumi_instance_template mvumi_instance_9580 = { 2041 .fire_cmd = mvumi_fire_cmd, 2042 .enable_intr = mvumi_enable_intr, 2043 .disable_intr = mvumi_disable_intr, 2044 .clear_intr = mvumi_clear_intr, 2045 .read_fw_status_reg = mvumi_read_fw_status_reg, 2046 .check_ib_list = mvumi_check_ib_list_9580, 2047 .check_ob_list = mvumi_check_ob_list_9580, 2048 .reset_host = mvumi_reset_host_9580, 2049 }; 2050 2051 static int mvumi_slave_configure(struct scsi_device *sdev) 2052 { 2053 struct mvumi_hba *mhba; 2054 unsigned char bitcount = sizeof(unsigned char) * 8; 2055 2056 mhba = (struct mvumi_hba *) sdev->host->hostdata; 2057 if (sdev->id >= mhba->max_target_id) 2058 return -EINVAL; 2059 2060 mhba->target_map[sdev->id / bitcount] |= (1 << (sdev->id % bitcount)); 2061 return 0; 2062 } 2063 2064 /** 2065 * mvumi_build_frame - Prepares a direct cdb (DCDB) command 2066 * @mhba: Adapter soft state 2067 * @scmd: SCSI command 2068 * @cmd: Command to be prepared in 2069 * 2070 * This function prepares CDB commands. These are typcially pass-through 2071 * commands to the devices. 2072 */ 2073 static unsigned char mvumi_build_frame(struct mvumi_hba *mhba, 2074 struct scsi_cmnd *scmd, struct mvumi_cmd *cmd) 2075 { 2076 struct mvumi_msg_frame *pframe; 2077 2078 cmd->scmd = scmd; 2079 cmd->cmd_status = REQ_STATUS_PENDING; 2080 pframe = cmd->frame; 2081 pframe->device_id = ((unsigned short) scmd->device->id) | 2082 (((unsigned short) scmd->device->lun) << 8); 2083 pframe->cmd_flag = 0; 2084 2085 switch (scmd->sc_data_direction) { 2086 case DMA_NONE: 2087 pframe->cmd_flag |= CMD_FLAG_NON_DATA; 2088 break; 2089 case DMA_FROM_DEVICE: 2090 pframe->cmd_flag |= CMD_FLAG_DATA_IN; 2091 break; 2092 case DMA_TO_DEVICE: 2093 pframe->cmd_flag |= CMD_FLAG_DATA_OUT; 2094 break; 2095 case DMA_BIDIRECTIONAL: 2096 default: 2097 dev_warn(&mhba->pdev->dev, "unexpected data direction[%d] " 2098 "cmd[0x%x]\n", scmd->sc_data_direction, scmd->cmnd[0]); 2099 goto error; 2100 } 2101 2102 pframe->cdb_length = scmd->cmd_len; 2103 memcpy(pframe->cdb, scmd->cmnd, pframe->cdb_length); 2104 pframe->req_function = CL_FUN_SCSI_CMD; 2105 if (scsi_bufflen(scmd)) { 2106 if (mvumi_make_sgl(mhba, scmd, &pframe->payload[0], 2107 &pframe->sg_counts)) 2108 goto error; 2109 2110 pframe->data_transfer_length = scsi_bufflen(scmd); 2111 } else { 2112 pframe->sg_counts = 0; 2113 pframe->data_transfer_length = 0; 2114 } 2115 return 0; 2116 2117 error: 2118 scmd->result = (DID_OK << 16) | (DRIVER_SENSE << 24) | 2119 SAM_STAT_CHECK_CONDITION; 2120 scsi_build_sense_buffer(0, scmd->sense_buffer, ILLEGAL_REQUEST, 0x24, 2121 0); 2122 return -1; 2123 } 2124 2125 /** 2126 * mvumi_queue_command - Queue entry point 2127 * @scmd: SCSI command to be queued 2128 * @done: Callback entry point 2129 */ 2130 static int mvumi_queue_command(struct Scsi_Host *shost, 2131 struct scsi_cmnd *scmd) 2132 { 2133 struct mvumi_cmd *cmd; 2134 struct mvumi_hba *mhba; 2135 unsigned long irq_flags; 2136 2137 spin_lock_irqsave(shost->host_lock, irq_flags); 2138 scsi_cmd_get_serial(shost, scmd); 2139 2140 mhba = (struct mvumi_hba *) shost->hostdata; 2141 scmd->result = 0; 2142 cmd = mvumi_get_cmd(mhba); 2143 if (unlikely(!cmd)) { 2144 spin_unlock_irqrestore(shost->host_lock, irq_flags); 2145 return SCSI_MLQUEUE_HOST_BUSY; 2146 } 2147 2148 if (unlikely(mvumi_build_frame(mhba, scmd, cmd))) 2149 goto out_return_cmd; 2150 2151 cmd->scmd = scmd; 2152 scmd->SCp.ptr = (char *) cmd; 2153 mhba->instancet->fire_cmd(mhba, cmd); 2154 spin_unlock_irqrestore(shost->host_lock, irq_flags); 2155 return 0; 2156 2157 out_return_cmd: 2158 mvumi_return_cmd(mhba, cmd); 2159 scmd->scsi_done(scmd); 2160 spin_unlock_irqrestore(shost->host_lock, irq_flags); 2161 return 0; 2162 } 2163 2164 static enum blk_eh_timer_return mvumi_timed_out(struct scsi_cmnd *scmd) 2165 { 2166 struct mvumi_cmd *cmd = (struct mvumi_cmd *) scmd->SCp.ptr; 2167 struct Scsi_Host *host = scmd->device->host; 2168 struct mvumi_hba *mhba = shost_priv(host); 2169 unsigned long flags; 2170 2171 spin_lock_irqsave(mhba->shost->host_lock, flags); 2172 2173 if (mhba->tag_cmd[cmd->frame->tag]) { 2174 mhba->tag_cmd[cmd->frame->tag] = 0; 2175 tag_release_one(mhba, &mhba->tag_pool, cmd->frame->tag); 2176 } 2177 if (!list_empty(&cmd->queue_pointer)) 2178 list_del_init(&cmd->queue_pointer); 2179 else 2180 atomic_dec(&mhba->fw_outstanding); 2181 2182 scmd->result = (DRIVER_INVALID << 24) | (DID_ABORT << 16); 2183 scmd->SCp.ptr = NULL; 2184 if (scsi_bufflen(scmd)) { 2185 if (scsi_sg_count(scmd)) { 2186 pci_unmap_sg(mhba->pdev, 2187 scsi_sglist(scmd), 2188 scsi_sg_count(scmd), 2189 (int)scmd->sc_data_direction); 2190 } else { 2191 pci_unmap_single(mhba->pdev, 2192 scmd->SCp.dma_handle, 2193 scsi_bufflen(scmd), 2194 (int)scmd->sc_data_direction); 2195 2196 scmd->SCp.dma_handle = 0; 2197 } 2198 } 2199 mvumi_return_cmd(mhba, cmd); 2200 spin_unlock_irqrestore(mhba->shost->host_lock, flags); 2201 2202 return BLK_EH_NOT_HANDLED; 2203 } 2204 2205 static int 2206 mvumi_bios_param(struct scsi_device *sdev, struct block_device *bdev, 2207 sector_t capacity, int geom[]) 2208 { 2209 int heads, sectors; 2210 sector_t cylinders; 2211 unsigned long tmp; 2212 2213 heads = 64; 2214 sectors = 32; 2215 tmp = heads * sectors; 2216 cylinders = capacity; 2217 sector_div(cylinders, tmp); 2218 2219 if (capacity >= 0x200000) { 2220 heads = 255; 2221 sectors = 63; 2222 tmp = heads * sectors; 2223 cylinders = capacity; 2224 sector_div(cylinders, tmp); 2225 } 2226 geom[0] = heads; 2227 geom[1] = sectors; 2228 geom[2] = cylinders; 2229 2230 return 0; 2231 } 2232 2233 static struct scsi_host_template mvumi_template = { 2234 2235 .module = THIS_MODULE, 2236 .name = "Marvell Storage Controller", 2237 .slave_configure = mvumi_slave_configure, 2238 .queuecommand = mvumi_queue_command, 2239 .eh_timed_out = mvumi_timed_out, 2240 .eh_host_reset_handler = mvumi_host_reset, 2241 .bios_param = mvumi_bios_param, 2242 .this_id = -1, 2243 }; 2244 2245 static int mvumi_cfg_hw_reg(struct mvumi_hba *mhba) 2246 { 2247 void *base = NULL; 2248 struct mvumi_hw_regs *regs; 2249 2250 switch (mhba->pdev->device) { 2251 case PCI_DEVICE_ID_MARVELL_MV9143: 2252 mhba->mmio = mhba->base_addr[0]; 2253 base = mhba->mmio; 2254 if (!mhba->regs) { 2255 mhba->regs = kzalloc(sizeof(*regs), GFP_KERNEL); 2256 if (mhba->regs == NULL) 2257 return -ENOMEM; 2258 } 2259 regs = mhba->regs; 2260 2261 /* For Arm */ 2262 regs->ctrl_sts_reg = base + 0x20104; 2263 regs->rstoutn_mask_reg = base + 0x20108; 2264 regs->sys_soft_rst_reg = base + 0x2010C; 2265 regs->main_int_cause_reg = base + 0x20200; 2266 regs->enpointa_mask_reg = base + 0x2020C; 2267 regs->rstoutn_en_reg = base + 0xF1400; 2268 /* For Doorbell */ 2269 regs->pciea_to_arm_drbl_reg = base + 0x20400; 2270 regs->arm_to_pciea_drbl_reg = base + 0x20408; 2271 regs->arm_to_pciea_mask_reg = base + 0x2040C; 2272 regs->pciea_to_arm_msg0 = base + 0x20430; 2273 regs->pciea_to_arm_msg1 = base + 0x20434; 2274 regs->arm_to_pciea_msg0 = base + 0x20438; 2275 regs->arm_to_pciea_msg1 = base + 0x2043C; 2276 2277 /* For Message Unit */ 2278 2279 regs->inb_aval_count_basel = base + 0x508; 2280 regs->inb_aval_count_baseh = base + 0x50C; 2281 regs->inb_write_pointer = base + 0x518; 2282 regs->inb_read_pointer = base + 0x51C; 2283 regs->outb_coal_cfg = base + 0x568; 2284 regs->outb_copy_basel = base + 0x5B0; 2285 regs->outb_copy_baseh = base + 0x5B4; 2286 regs->outb_copy_pointer = base + 0x544; 2287 regs->outb_read_pointer = base + 0x548; 2288 regs->outb_isr_cause = base + 0x560; 2289 regs->outb_coal_cfg = base + 0x568; 2290 /* Bit setting for HW */ 2291 regs->int_comaout = 1 << 8; 2292 regs->int_comaerr = 1 << 6; 2293 regs->int_dl_cpu2pciea = 1 << 1; 2294 regs->cl_pointer_toggle = 1 << 12; 2295 regs->clic_irq = 1 << 1; 2296 regs->clic_in_err = 1 << 8; 2297 regs->clic_out_err = 1 << 12; 2298 regs->cl_slot_num_mask = 0xFFF; 2299 regs->int_drbl_int_mask = 0x3FFFFFFF; 2300 regs->int_mu = regs->int_dl_cpu2pciea | regs->int_comaout | 2301 regs->int_comaerr; 2302 break; 2303 case PCI_DEVICE_ID_MARVELL_MV9580: 2304 mhba->mmio = mhba->base_addr[2]; 2305 base = mhba->mmio; 2306 if (!mhba->regs) { 2307 mhba->regs = kzalloc(sizeof(*regs), GFP_KERNEL); 2308 if (mhba->regs == NULL) 2309 return -ENOMEM; 2310 } 2311 regs = mhba->regs; 2312 /* For Arm */ 2313 regs->ctrl_sts_reg = base + 0x20104; 2314 regs->rstoutn_mask_reg = base + 0x1010C; 2315 regs->sys_soft_rst_reg = base + 0x10108; 2316 regs->main_int_cause_reg = base + 0x10200; 2317 regs->enpointa_mask_reg = base + 0x1020C; 2318 regs->rstoutn_en_reg = base + 0xF1400; 2319 2320 /* For Doorbell */ 2321 regs->pciea_to_arm_drbl_reg = base + 0x10460; 2322 regs->arm_to_pciea_drbl_reg = base + 0x10480; 2323 regs->arm_to_pciea_mask_reg = base + 0x10484; 2324 regs->pciea_to_arm_msg0 = base + 0x10400; 2325 regs->pciea_to_arm_msg1 = base + 0x10404; 2326 regs->arm_to_pciea_msg0 = base + 0x10420; 2327 regs->arm_to_pciea_msg1 = base + 0x10424; 2328 2329 /* For reset*/ 2330 regs->reset_request = base + 0x10108; 2331 regs->reset_enable = base + 0x1010c; 2332 2333 /* For Message Unit */ 2334 regs->inb_aval_count_basel = base + 0x4008; 2335 regs->inb_aval_count_baseh = base + 0x400C; 2336 regs->inb_write_pointer = base + 0x4018; 2337 regs->inb_read_pointer = base + 0x401C; 2338 regs->outb_copy_basel = base + 0x4058; 2339 regs->outb_copy_baseh = base + 0x405C; 2340 regs->outb_copy_pointer = base + 0x406C; 2341 regs->outb_read_pointer = base + 0x4070; 2342 regs->outb_coal_cfg = base + 0x4080; 2343 regs->outb_isr_cause = base + 0x4088; 2344 /* Bit setting for HW */ 2345 regs->int_comaout = 1 << 4; 2346 regs->int_dl_cpu2pciea = 1 << 12; 2347 regs->int_comaerr = 1 << 29; 2348 regs->cl_pointer_toggle = 1 << 14; 2349 regs->cl_slot_num_mask = 0x3FFF; 2350 regs->clic_irq = 1 << 0; 2351 regs->clic_out_err = 1 << 1; 2352 regs->int_drbl_int_mask = 0x3FFFFFFF; 2353 regs->int_mu = regs->int_dl_cpu2pciea | regs->int_comaout; 2354 break; 2355 default: 2356 return -1; 2357 break; 2358 } 2359 2360 return 0; 2361 } 2362 2363 /** 2364 * mvumi_init_fw - Initializes the FW 2365 * @mhba: Adapter soft state 2366 * 2367 * This is the main function for initializing firmware. 2368 */ 2369 static int mvumi_init_fw(struct mvumi_hba *mhba) 2370 { 2371 int ret = 0; 2372 2373 if (pci_request_regions(mhba->pdev, MV_DRIVER_NAME)) { 2374 dev_err(&mhba->pdev->dev, "IO memory region busy!\n"); 2375 return -EBUSY; 2376 } 2377 ret = mvumi_map_pci_addr(mhba->pdev, mhba->base_addr); 2378 if (ret) 2379 goto fail_ioremap; 2380 2381 switch (mhba->pdev->device) { 2382 case PCI_DEVICE_ID_MARVELL_MV9143: 2383 mhba->instancet = &mvumi_instance_9143; 2384 mhba->io_seq = 0; 2385 mhba->max_sge = MVUMI_MAX_SG_ENTRY; 2386 mhba->request_id_enabled = 1; 2387 break; 2388 case PCI_DEVICE_ID_MARVELL_MV9580: 2389 mhba->instancet = &mvumi_instance_9580; 2390 mhba->io_seq = 0; 2391 mhba->max_sge = MVUMI_MAX_SG_ENTRY; 2392 break; 2393 default: 2394 dev_err(&mhba->pdev->dev, "device 0x%x not supported!\n", 2395 mhba->pdev->device); 2396 mhba->instancet = NULL; 2397 ret = -EINVAL; 2398 goto fail_alloc_mem; 2399 } 2400 dev_dbg(&mhba->pdev->dev, "device id : %04X is found.\n", 2401 mhba->pdev->device); 2402 ret = mvumi_cfg_hw_reg(mhba); 2403 if (ret) { 2404 dev_err(&mhba->pdev->dev, 2405 "failed to allocate memory for reg\n"); 2406 ret = -ENOMEM; 2407 goto fail_alloc_mem; 2408 } 2409 mhba->handshake_page = pci_alloc_consistent(mhba->pdev, HSP_MAX_SIZE, 2410 &mhba->handshake_page_phys); 2411 if (!mhba->handshake_page) { 2412 dev_err(&mhba->pdev->dev, 2413 "failed to allocate memory for handshake\n"); 2414 ret = -ENOMEM; 2415 goto fail_alloc_page; 2416 } 2417 2418 if (mvumi_start(mhba)) { 2419 ret = -EINVAL; 2420 goto fail_ready_state; 2421 } 2422 ret = mvumi_alloc_cmds(mhba); 2423 if (ret) 2424 goto fail_ready_state; 2425 2426 return 0; 2427 2428 fail_ready_state: 2429 mvumi_release_mem_resource(mhba); 2430 pci_free_consistent(mhba->pdev, HSP_MAX_SIZE, 2431 mhba->handshake_page, mhba->handshake_page_phys); 2432 fail_alloc_page: 2433 kfree(mhba->regs); 2434 fail_alloc_mem: 2435 mvumi_unmap_pci_addr(mhba->pdev, mhba->base_addr); 2436 fail_ioremap: 2437 pci_release_regions(mhba->pdev); 2438 2439 return ret; 2440 } 2441 2442 /** 2443 * mvumi_io_attach - Attaches this driver to SCSI mid-layer 2444 * @mhba: Adapter soft state 2445 */ 2446 static int mvumi_io_attach(struct mvumi_hba *mhba) 2447 { 2448 struct Scsi_Host *host = mhba->shost; 2449 struct scsi_device *sdev = NULL; 2450 int ret; 2451 unsigned int max_sg = (mhba->ib_max_size + 4 - 2452 sizeof(struct mvumi_msg_frame)) / sizeof(struct mvumi_sgl); 2453 2454 host->irq = mhba->pdev->irq; 2455 host->unique_id = mhba->unique_id; 2456 host->can_queue = (mhba->max_io - 1) ? (mhba->max_io - 1) : 1; 2457 host->sg_tablesize = mhba->max_sge > max_sg ? max_sg : mhba->max_sge; 2458 host->max_sectors = mhba->max_transfer_size / 512; 2459 host->cmd_per_lun = (mhba->max_io - 1) ? (mhba->max_io - 1) : 1; 2460 host->max_id = mhba->max_target_id; 2461 host->max_cmd_len = MAX_COMMAND_SIZE; 2462 2463 ret = scsi_add_host(host, &mhba->pdev->dev); 2464 if (ret) { 2465 dev_err(&mhba->pdev->dev, "scsi_add_host failed\n"); 2466 return ret; 2467 } 2468 mhba->fw_flag |= MVUMI_FW_ATTACH; 2469 2470 mutex_lock(&mhba->sas_discovery_mutex); 2471 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) 2472 ret = scsi_add_device(host, 0, mhba->max_target_id - 1, 0); 2473 else 2474 ret = 0; 2475 if (ret) { 2476 dev_err(&mhba->pdev->dev, "add virtual device failed\n"); 2477 mutex_unlock(&mhba->sas_discovery_mutex); 2478 goto fail_add_device; 2479 } 2480 2481 mhba->dm_thread = kthread_create(mvumi_rescan_bus, 2482 mhba, "mvumi_scanthread"); 2483 if (IS_ERR(mhba->dm_thread)) { 2484 dev_err(&mhba->pdev->dev, 2485 "failed to create device scan thread\n"); 2486 mutex_unlock(&mhba->sas_discovery_mutex); 2487 goto fail_create_thread; 2488 } 2489 atomic_set(&mhba->pnp_count, 1); 2490 wake_up_process(mhba->dm_thread); 2491 2492 mutex_unlock(&mhba->sas_discovery_mutex); 2493 return 0; 2494 2495 fail_create_thread: 2496 if (mhba->pdev->device == PCI_DEVICE_ID_MARVELL_MV9580) 2497 sdev = scsi_device_lookup(mhba->shost, 0, 2498 mhba->max_target_id - 1, 0); 2499 if (sdev) { 2500 scsi_remove_device(sdev); 2501 scsi_device_put(sdev); 2502 } 2503 fail_add_device: 2504 scsi_remove_host(mhba->shost); 2505 return ret; 2506 } 2507 2508 /** 2509 * mvumi_probe_one - PCI hotplug entry point 2510 * @pdev: PCI device structure 2511 * @id: PCI ids of supported hotplugged adapter 2512 */ 2513 static int mvumi_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) 2514 { 2515 struct Scsi_Host *host; 2516 struct mvumi_hba *mhba; 2517 int ret; 2518 2519 dev_dbg(&pdev->dev, " %#4.04x:%#4.04x:%#4.04x:%#4.04x: ", 2520 pdev->vendor, pdev->device, pdev->subsystem_vendor, 2521 pdev->subsystem_device); 2522 2523 ret = pci_enable_device(pdev); 2524 if (ret) 2525 return ret; 2526 2527 pci_set_master(pdev); 2528 2529 if (IS_DMA64) { 2530 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2531 if (ret) { 2532 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2533 if (ret) 2534 goto fail_set_dma_mask; 2535 } 2536 } else { 2537 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2538 if (ret) 2539 goto fail_set_dma_mask; 2540 } 2541 2542 host = scsi_host_alloc(&mvumi_template, sizeof(*mhba)); 2543 if (!host) { 2544 dev_err(&pdev->dev, "scsi_host_alloc failed\n"); 2545 ret = -ENOMEM; 2546 goto fail_alloc_instance; 2547 } 2548 mhba = shost_priv(host); 2549 2550 INIT_LIST_HEAD(&mhba->cmd_pool); 2551 INIT_LIST_HEAD(&mhba->ob_data_list); 2552 INIT_LIST_HEAD(&mhba->free_ob_list); 2553 INIT_LIST_HEAD(&mhba->res_list); 2554 INIT_LIST_HEAD(&mhba->waiting_req_list); 2555 mutex_init(&mhba->device_lock); 2556 INIT_LIST_HEAD(&mhba->mhba_dev_list); 2557 INIT_LIST_HEAD(&mhba->shost_dev_list); 2558 atomic_set(&mhba->fw_outstanding, 0); 2559 init_waitqueue_head(&mhba->int_cmd_wait_q); 2560 mutex_init(&mhba->sas_discovery_mutex); 2561 2562 mhba->pdev = pdev; 2563 mhba->shost = host; 2564 mhba->unique_id = pdev->bus->number << 8 | pdev->devfn; 2565 2566 ret = mvumi_init_fw(mhba); 2567 if (ret) 2568 goto fail_init_fw; 2569 2570 ret = request_irq(mhba->pdev->irq, mvumi_isr_handler, IRQF_SHARED, 2571 "mvumi", mhba); 2572 if (ret) { 2573 dev_err(&pdev->dev, "failed to register IRQ\n"); 2574 goto fail_init_irq; 2575 } 2576 2577 mhba->instancet->enable_intr(mhba); 2578 pci_set_drvdata(pdev, mhba); 2579 2580 ret = mvumi_io_attach(mhba); 2581 if (ret) 2582 goto fail_io_attach; 2583 2584 mvumi_backup_bar_addr(mhba); 2585 dev_dbg(&pdev->dev, "probe mvumi driver successfully.\n"); 2586 2587 return 0; 2588 2589 fail_io_attach: 2590 mhba->instancet->disable_intr(mhba); 2591 free_irq(mhba->pdev->irq, mhba); 2592 fail_init_irq: 2593 mvumi_release_fw(mhba); 2594 fail_init_fw: 2595 scsi_host_put(host); 2596 2597 fail_alloc_instance: 2598 fail_set_dma_mask: 2599 pci_disable_device(pdev); 2600 2601 return ret; 2602 } 2603 2604 static void mvumi_detach_one(struct pci_dev *pdev) 2605 { 2606 struct Scsi_Host *host; 2607 struct mvumi_hba *mhba; 2608